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author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-11 13:48:48 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-01-11 13:48:48 -0600 |
commit | bf59a9298f6154cb85ebebabd4f45738caf29b35 (patch) | |
tree | c1fb403509108916dcb36e4d432a877d733085ab /src/mem/ruby/system/RubyPort.hh | |
parent | 3f8065290a4740baea8b9a8ebcd361b161636d56 (diff) | |
download | gem5-bf59a9298f6154cb85ebebabd4f45738caf29b35.tar.xz |
Ruby: Resurrect Cache Warmup Capability
This patch resurrects ruby's cache warmup capability. It essentially
makes use of all the infrastructure that was added to the controllers,
memories and the cache recorder.
Diffstat (limited to 'src/mem/ruby/system/RubyPort.hh')
-rw-r--r-- | src/mem/ruby/system/RubyPort.hh | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh index 0160d8fc8..d8dbe0cda 100644 --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -33,7 +33,6 @@ #include <string> #include "mem/protocol/RequestStatus.hh" -#include "mem/ruby/slicc_interface/RubyRequest.hh" #include "mem/ruby/system/System.hh" #include "mem/mem_object.hh" #include "mem/physical.hh" @@ -115,17 +114,23 @@ class RubyPort : public MemObject Port *getPort(const std::string &if_name, int idx); virtual RequestStatus makeRequest(PacketPtr pkt) = 0; + virtual int outstandingCount() const = 0; + virtual bool isDeadlockEventScheduled() const = 0; + virtual void descheduleDeadlockEvent() = 0; // // Called by the controller to give the sequencer a pointer. // A pointer to the controller is needed for atomic support. // void setController(AbstractController* _cntrl) { m_controller = _cntrl; } + int getId() { return m_version; } + unsigned int drain(Event *de); protected: const std::string m_name; void ruby_hit_callback(PacketPtr pkt); void hit(PacketPtr pkt); + void testDrainComplete(); int m_version; AbstractController* m_controller; @@ -143,6 +148,8 @@ class RubyPort : public MemObject } } + unsigned int getDrainCount(Event *de); + uint16_t m_port_id; uint64_t m_request_cnt; @@ -152,6 +159,8 @@ class RubyPort : public MemObject typedef std::vector<M5Port*>::iterator CpuPortIter; std::vector<M5Port*> cpu_ports; + Event *drainEvent; + PhysicalMemory* physmem; RubySystem* ruby_system; |