diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:59 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:59 -0500 |
commit | 611f052e963b06b4a7e02b2fc6d847cd6d08d038 (patch) | |
tree | 0a3bdb5787d5e6ae9b0e07145cf2d32b4a532d6b /src/mem/ruby/system/Sequencer.cc | |
parent | 2f4276448b82b2aa077ae257171b5cb04b7048f6 (diff) | |
download | gem5-611f052e963b06b4a7e02b2fc6d847cd6d08d038.tar.xz |
Ruby: Convert CacheRequestType to RubyRequestType
This patch converts CacheRequestType to RubyRequestType so that both the
protocol dependent and independent code makes use of the same request type.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.cc')
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 7f916957b..6b0f6e49f 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -604,16 +604,16 @@ Sequencer::makeRequest(const RubyRequest &request) void Sequencer::issueRequest(const RubyRequest& request) { - // TODO: get rid of CacheMsg, CacheRequestType, and + // TODO: get rid of CacheMsg, RubyRequestType, and // AccessModeTYpe, & have SLICC use RubyRequest and subtypes // natively - CacheRequestType ctype; + RubyRequestType ctype; switch(request.type) { case RubyRequestType_IFETCH: - ctype = CacheRequestType_IFETCH; + ctype = RubyRequestType_IFETCH; break; case RubyRequestType_LD: - ctype = CacheRequestType_LD; + ctype = RubyRequestType_LD; break; case RubyRequestType_ST: case RubyRequestType_RMW_Read: @@ -626,7 +626,7 @@ Sequencer::issueRequest(const RubyRequest& request) // case RubyRequestType_Locked_RMW_Read: case RubyRequestType_Locked_RMW_Write: - ctype = CacheRequestType_ST; + ctype = RubyRequestType_ST; break; // // Alpha LL/SC instructions need to be handled carefully by the cache @@ -638,7 +638,7 @@ Sequencer::issueRequest(const RubyRequest& request) // case RubyRequestType_Load_Linked: case RubyRequestType_Store_Conditional: - ctype = CacheRequestType_ATOMIC; + ctype = RubyRequestType_ATOMIC; break; default: assert(0); @@ -685,12 +685,12 @@ Sequencer::issueRequest(const RubyRequest& request) #if 0 bool -Sequencer::tryCacheAccess(const Address& addr, CacheRequestType type, +Sequencer::tryCacheAccess(const Address& addr, RubyRequestType type, RubyAccessMode access_mode, int size, DataBlock*& data_ptr) { CacheMemory *cache = - (type == CacheRequestType_IFETCH) ? m_instCache_ptr : m_dataCache_ptr; + (type == RubyRequestType_IFETCH) ? m_instCache_ptr : m_dataCache_ptr; return cache->tryCacheAccess(line_address(addr), type, data_ptr); } |