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authorAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
committerAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
commitacd289b7ef5862bdac391672f0e1ad20fbfadab0 (patch)
tree00e7a7968437030c923790ce60b83d7e124b838d /src/mem/ruby/system/Sequencer.cc
parent55cf3f4ac11668c4da71411a4221cc8c84298b1a (diff)
downloadgem5-acd289b7ef5862bdac391672f0e1ad20fbfadab0.tar.xz
MEM: Make the bus default port yet another port
This patch removes the idiosyncratic nature of the default bus port and makes it yet another port in the list of interfaces. Rather than having a specific pointer to the default port we merely track the identifier of this port. This change makes future port diversification easier and overall cleans up the bus code.
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