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| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
| commit | 287ea1a081c5dd3213069755dbbd3d7bf736bacc (patch) | |
| tree | e48487569786a562138445d746354b610cf5011f /src/mem/ruby/system/Sequencer.hh | |
| parent | 4124ea09f8e2f6934fe746ff7c244dba7230cac9 (diff) | |
| download | gem5-287ea1a081c5dd3213069755dbbd3d7bf736bacc.tar.xz | |
Param: Transition to Cycles for relevant parameters
This patch is a first step to using Cycles as a parameter type. The
main affected modules are the CPUs and the Ruby caches. There are
definitely plenty more places that are affected, but this patch serves
as a starting point to making the transition.
An important part of this patch is to actually enable parameters to be
specified as Param.Cycles which involves some changes to params.py.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.hh')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index dbdfca38e..cc63a93a4 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -139,7 +139,7 @@ class Sequencer : public RubyPort private: int m_max_outstanding_requests; - int m_deadlock_threshold; + Cycles m_deadlock_threshold; CacheMemory* m_dataCache_ptr; CacheMemory* m_instCache_ptr; |