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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:37 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:37 -0500 |
| commit | 2f4276448b82b2aa077ae257171b5cb04b7048f6 (patch) | |
| tree | 7e5d6bdcf8b3028ac7aed6c889efb820b2db91d9 /src/mem/ruby/system/Sequencer.hh | |
| parent | dd9083115ed3f1ee297c2ff7255fdd3fee276e7a (diff) | |
| download | gem5-2f4276448b82b2aa077ae257171b5cb04b7048f6.tar.xz | |
Ruby: Convert AccessModeType to RubyAccessMode
This patch converts AccessModeType to RubyAccessMode so that both the
protocol dependent and independent code uses the same access mode.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.hh')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index 453a8cbae..7793af889 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -32,7 +32,7 @@ #include <iostream> #include "base/hashmap.hh" -#include "mem/protocol/AccessModeType.hh" +#include "mem/protocol/RubyAccessMode.hh" #include "mem/protocol/CacheRequestType.hh" #include "mem/protocol/GenericMachineType.hh" #include "mem/protocol/PrefetchBit.hh" @@ -113,7 +113,7 @@ class Sequencer : public RubyPort, public Consumer private: bool tryCacheAccess(const Address& addr, CacheRequestType type, - const Address& pc, AccessModeType access_mode, + const Address& pc, RubyAccessMode access_mode, int size, DataBlock*& data_ptr); void issueRequest(const RubyRequest& request); |