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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:59 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:59 -0500 |
| commit | 611f052e963b06b4a7e02b2fc6d847cd6d08d038 (patch) | |
| tree | 0a3bdb5787d5e6ae9b0e07145cf2d32b4a532d6b /src/mem/ruby/system/Sequencer.hh | |
| parent | 2f4276448b82b2aa077ae257171b5cb04b7048f6 (diff) | |
| download | gem5-611f052e963b06b4a7e02b2fc6d847cd6d08d038.tar.xz | |
Ruby: Convert CacheRequestType to RubyRequestType
This patch converts CacheRequestType to RubyRequestType so that both the
protocol dependent and independent code makes use of the same request type.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.hh')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index 7793af889..14b6997e8 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -33,7 +33,7 @@ #include "base/hashmap.hh" #include "mem/protocol/RubyAccessMode.hh" -#include "mem/protocol/CacheRequestType.hh" +#include "mem/protocol/RubyRequestType.hh" #include "mem/protocol/GenericMachineType.hh" #include "mem/protocol/PrefetchBit.hh" #include "mem/ruby/common/Address.hh" @@ -112,7 +112,7 @@ class Sequencer : public RubyPort, public Consumer void removeRequest(SequencerRequest* request); private: - bool tryCacheAccess(const Address& addr, CacheRequestType type, + bool tryCacheAccess(const Address& addr, RubyRequestType type, const Address& pc, RubyAccessMode access_mode, int size, DataBlock*& data_ptr); void issueRequest(const RubyRequest& request); |