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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:12 -0700 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:12 -0700 |
| commit | 8e5c441a54b481085d6311f14af66e41b5766f91 (patch) | |
| tree | 8d0e6f8395685fb8a7fb2eda83e572301e687d1a /src/mem/ruby/system/Sequencer.hh | |
| parent | 54d76f0ce5d721ad3b4de168db98054844e634cc (diff) | |
| download | gem5-8e5c441a54b481085d6311f14af66e41b5766f91.tar.xz | |
ruby: fix ruby llsc support to sync sc outcomes
Added support so that ruby can determine the outcome of store conditional
operations and reflect that outcome to M5 physical memory and cpus.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.hh')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index fd6b390c2..c298e27dd 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -109,6 +109,7 @@ class Sequencer : public RubyPort, public Consumer bool insertRequest(SequencerRequest* request); + void handleLlscWrites(const Address& address, SequencerRequest* request); // Private copy constructor and assignment operator Sequencer(const Sequencer& obj); |