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authorSteve Reinhardt <steve.reinhardt@amd.com>2010-01-29 20:29:17 -0800
committerSteve Reinhardt <steve.reinhardt@amd.com>2010-01-29 20:29:17 -0800
commit98c94cfe3ce83634f3bad79ca18263f42e36ca6a (patch)
treeb299448162932c5574b87238a3b02a01efd14db6 /src/mem/ruby/system/Sequencer.py
parentb43994ba45b7805da0d1d9600e5cbb8332057403 (diff)
downloadgem5-98c94cfe3ce83634f3bad79ca18263f42e36ca6a.tar.xz
ruby: Convert most Ruby objects to M5 SimObjects.
The necessary companion conversion of Ruby objects generated by SLICC are converted to M5 SimObjects in the following patch, so this patch alone does not compile. Conversion of Garnet network models is also handled in a separate patch; that code is temporarily disabled from compiling to allow testing of interim code.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.py')
-rw-r--r--src/mem/ruby/system/Sequencer.py23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
new file mode 100644
index 000000000..add5a06a1
--- /dev/null
+++ b/src/mem/ruby/system/Sequencer.py
@@ -0,0 +1,23 @@
+from m5.params import *
+from MemObject import MemObject
+
+class RubyPort(MemObject):
+ type = 'RubyPort'
+ abstract = True
+ port = VectorPort("M5 port")
+ controller = Param.RubyController("")
+ version = Param.Int(0, "")
+
+class RubySequencer(RubyPort):
+ type = 'RubySequencer'
+ cxx_class = 'Sequencer'
+ icache = Param.RubyCache("")
+ dcache = Param.RubyCache("")
+ max_outstanding_requests = Param.Int(16,
+ "max requests (incl. prefetches) outstanding")
+ deadlock_threshold = Param.Int(500000,
+ "max outstanding cycles for a request before deadlock/livelock declared")
+ funcmem_port = Port("port to functional memory")
+
+class DMASequencer(RubyPort):
+ type = 'DMASequencer'