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| author | Michael LeBeane <Michael.Lebeane@amd.com> | 2016-02-14 20:28:48 -0500 |
|---|---|---|
| committer | Michael LeBeane <Michael.Lebeane@amd.com> | 2016-02-14 20:28:48 -0500 |
| commit | b181cea3645929d11b21a29ac8c3e3ed3079e91b (patch) | |
| tree | eb0025357f0e3847c9633e4bf1b193f2937b3a5b /src/mem/ruby/system/Sequencer.py | |
| parent | 2ae4cce3934873908afacc81b65d4093731a3e93 (diff) | |
| download | gem5-b181cea3645929d11b21a29ac8c3e3ed3079e91b.tar.xz | |
ruby: make DMASequencer inherit from RubyPort
This patch essentially rolls back 10518:30e3715c9405 to make RubyPort the
parent class of DMASequencer. It removes redundant code and restores some
features which were lost when directly inheriting from MemObject. For
example,
DMASequencer can now communicate to other devices using PIO, which is useful
for memmory-mapped communication between multiple DMADevices.
Diffstat (limited to 'src/mem/ruby/system/Sequencer.py')
| -rw-r--r-- | src/mem/ruby/system/Sequencer.py | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py index d6ee0aa2f..5b6a673da 100644 --- a/src/mem/ruby/system/Sequencer.py +++ b/src/mem/ruby/system/Sequencer.py @@ -78,12 +78,6 @@ class RubySequencer(RubyPort): # 99 is the dummy default value coreid = Param.Int(99, "CorePair core id") -class DMASequencer(MemObject): +class DMASequencer(RubyPort): type = 'DMASequencer' cxx_header = "mem/ruby/system/DMASequencer.hh" - - version = Param.Int(0, "") - slave = SlavePort("Device slave port") - using_ruby_tester = Param.Bool(False, "") - ruby_system = Param.RubySystem(Parent.any, "") - system = Param.System(Parent.any, "system object") |