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authorBrad Beckmann <Brad.Beckmann@amd.com>2010-01-29 20:29:21 -0800
committerBrad Beckmann <Brad.Beckmann@amd.com>2010-01-29 20:29:21 -0800
commitce2d13195ba14766e7ac7f093b369865b6c92cac (patch)
treec7525d386d03560399a1499e8704734066843685 /src/mem/ruby/system/Sequencer.py
parentdc758641c938bb3941bfc1751dc8c3781d99b441 (diff)
downloadgem5-ce2d13195ba14766e7ac7f093b369865b6c92cac.tar.xz
ruby: FS support using the new configuration system
Diffstat (limited to 'src/mem/ruby/system/Sequencer.py')
-rw-r--r--src/mem/ruby/system/Sequencer.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/ruby/system/Sequencer.py b/src/mem/ruby/system/Sequencer.py
index 1333204a2..30cb9add0 100644
--- a/src/mem/ruby/system/Sequencer.py
+++ b/src/mem/ruby/system/Sequencer.py
@@ -8,6 +8,8 @@ class RubyPort(MemObject):
port = VectorPort("M5 port")
version = Param.Int(0, "")
pio_port = Port("Ruby_pio_port")
+ physmem = Param.PhysicalMemory("")
+ physMemPort = Port("port to physical memory")
class RubySequencer(RubyPort):
type = 'RubySequencer'
@@ -18,7 +20,6 @@ class RubySequencer(RubyPort):
"max requests (incl. prefetches) outstanding")
deadlock_threshold = Param.Int(500000,
"max outstanding cycles for a request before deadlock/livelock declared")
- funcmem_port = Port("port to functional memory")
class DMASequencer(RubyPort):
type = 'DMASequencer'