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authorLisa Hsu <Lisa.Hsu@amd.com>2011-03-31 17:17:57 -0700
committerLisa Hsu <Lisa.Hsu@amd.com>2011-03-31 17:17:57 -0700
commit322b9ca2c5b0465db7086abdc6eadca061932575 (patch)
treeb14837962707de7b90b95c0b0a7b09ffa1988847 /src/mem/ruby/system/WireBuffer.cc
parent06fcaf9104cefe5a2c0062b9357dae46bfd9992a (diff)
downloadgem5-322b9ca2c5b0465db7086abdc6eadca061932575.tar.xz
Ruby: Add new object called WireBuffer to mimic a Wire.
This is a substitute for MessageBuffers between controllers where you don't want messages to actually go through the Network, because requests/responses can always get reordered wrt to one another (even if you turn off Randomization and turn on Ordered) because you are, after all, going through a network with contention. For systems where you model multiple controllers that are very tightly coupled and do not actually go through a network, it is a pain to have to write a coherence protocol to account for mixed up request/response orderings despite the fact that it's completely unrealistic. This is *not* meant as a substitute for real MessageBuffers when messages do in fact go over a network.
Diffstat (limited to 'src/mem/ruby/system/WireBuffer.cc')
-rw-r--r--src/mem/ruby/system/WireBuffer.cc171
1 files changed, 171 insertions, 0 deletions
diff --git a/src/mem/ruby/system/WireBuffer.cc b/src/mem/ruby/system/WireBuffer.cc
new file mode 100644
index 000000000..bab935c5d
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+++ b/src/mem/ruby/system/WireBuffer.cc
@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2010 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Lisa Hsu
+ *
+ */
+
+#include <algorithm>
+#include <functional>
+
+#include "base/cprintf.hh"
+#include "base/stl_helpers.hh"
+#include "mem/ruby/system/WireBuffer.hh"
+
+using namespace std;
+
+class Consumer;
+
+
+// Output operator definition
+
+ostream&
+operator<<(ostream& out, const WireBuffer& obj)
+{
+ obj.print(out);
+ out << flush;
+ return out;
+}
+
+
+// ****************************************************************
+
+// CONSTRUCTOR
+WireBuffer::WireBuffer(const Params *p)
+ : SimObject(p)
+{
+ m_msg_counter = 0;
+}
+
+void
+WireBuffer::init()
+{
+}
+
+WireBuffer::~WireBuffer()
+{
+}
+
+void
+WireBuffer::enqueue(MsgPtr message, int latency)
+{
+ m_msg_counter++;
+ Time current_time = g_eventQueue_ptr->getTime();
+ Time arrival_time = current_time + latency;
+ assert(arrival_time > current_time);
+ MessageBufferNode thisNode(arrival_time, m_msg_counter, message);
+ m_message_queue.push_back(thisNode);
+ if (m_consumer_ptr != NULL) {
+ g_eventQueue_ptr->scheduleEventAbsolute(m_consumer_ptr, arrival_time);
+ } else {
+ panic("No Consumer for WireBuffer! %s\n", *this);
+ }
+}
+
+void
+WireBuffer::dequeue()
+{
+ assert(isReady());
+ pop_heap(m_message_queue.begin(), m_message_queue.end(),
+ greater<MessageBufferNode>());
+ m_message_queue.pop_back();
+}
+
+const Message*
+WireBuffer::peek()
+{
+ MessageBufferNode node = peekNode();
+ Message* msg_ptr = node.m_msgptr.get();
+ assert(msg_ptr != NULL);
+ return msg_ptr;
+}
+
+MessageBufferNode
+WireBuffer::peekNode()
+{
+ assert(isReady());
+ MessageBufferNode req = m_message_queue.front();
+ return req;
+}
+
+void
+WireBuffer::recycle()
+{
+ // Because you don't want anything reordered, make sure the recycle latency
+ // is just 1 cycle. As a result, you really want to use this only in
+ // Wire-like situations because you don't want to deadlock as a result of
+ // being stuck behind something if you're not actually supposed to.
+ assert(isReady());
+ MessageBufferNode node = m_message_queue.front();
+ pop_heap(m_message_queue.begin(), m_message_queue.end(),
+ greater<MessageBufferNode>());
+ node.m_time = g_eventQueue_ptr->getTime() + 1;
+ m_message_queue.back() = node;
+ push_heap(m_message_queue.begin(), m_message_queue.end(),
+ greater<MessageBufferNode>());
+ g_eventQueue_ptr->scheduleEventAbsolute(m_consumer_ptr,
+ g_eventQueue_ptr->getTime() + 1);
+}
+
+bool
+WireBuffer::isReady()
+{
+ return ((!m_message_queue.empty()) &&
+ (m_message_queue.front().m_time <= g_eventQueue_ptr->getTime()));
+}
+
+void
+WireBuffer::print(ostream& out) const
+{
+}
+
+void
+WireBuffer::printConfig(ostream& out)
+{
+}
+
+void
+WireBuffer::clearStats() const
+{
+}
+
+void
+WireBuffer::printStats(ostream& out) const
+{
+}
+
+void
+WireBuffer::wakeup()
+{
+}
+
+WireBuffer *
+RubyWireBufferParams::create()
+{
+ return new WireBuffer(this);
+}
+