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authorNilay Vaish <nilay@cs.wisc.edu>2011-08-03 18:25:30 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2011-08-03 18:25:30 -0500
commit720c0be620bd3427b5222e437fc7a82cb3a9ad7f (patch)
tree8bb28460993cea2b4d33d704fe77d18e491ac4a1 /src/mem/ruby/system
parent6230668f5e7e4d7298d039a99d3bd73d9064bea9 (diff)
downloadgem5-720c0be620bd3427b5222e437fc7a82cb3a9ad7f.tar.xz
Ruby: Remove files and includes not in use
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/DirectoryMemory.cc28
-rw-r--r--src/mem/ruby/system/Sequencer.cc1
-rw-r--r--src/mem/ruby/system/System.hh2
3 files changed, 0 insertions, 31 deletions
diff --git a/src/mem/ruby/system/DirectoryMemory.cc b/src/mem/ruby/system/DirectoryMemory.cc
index c461ce09b..a91f05a69 100644
--- a/src/mem/ruby/system/DirectoryMemory.cc
+++ b/src/mem/ruby/system/DirectoryMemory.cc
@@ -184,34 +184,6 @@ DirectoryMemory::lookup(PhysAddress address)
return *entry;
}
-#if 0
-Directory_Entry&
-DirectoryMemory::lookup(PhysAddress address)
-{
- assert(isPresent(address));
- Index index = address.memoryModuleIndex();
-
- if (index < 0 || index > m_size) {
- WARN_EXPR(address.getAddress());
- WARN_EXPR(index);
- WARN_EXPR(m_size);
- ERROR_MSG("Directory Memory Assertion: accessing memory out of range");
- }
- Directory_Entry* entry = m_entries[index];
-
- // allocate the directory entry on demand.
- if (entry == NULL) {
- entry = new Directory_Entry;
- entry->getDataBlk().assign(m_ram->getBlockPtr(address));
-
- // store entry to the table
- m_entries[index] = entry;
- }
-
- return *entry;
-}
-#endif
-
void
DirectoryMemory::invalidateBlock(PhysAddress address)
{
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 1b46e680d..dcee57146 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -31,7 +31,6 @@
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/MemoryAccess.hh"
#include "debug/ProtocolTrace.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 88a0186c5..15abf1c0f 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -44,7 +44,6 @@
#include "sim/sim_object.hh"
class AbstractController;
-class AbstractMemory;
class CacheRecorder;
class MemoryVector;
class Network;
@@ -134,7 +133,6 @@ class RubySystem : public SimObject
void registerNetwork(Network*);
void registerProfiler(Profiler*);
void registerTracer(Tracer*);
- void registerAbstractMemory(AbstractMemory*);
void registerAbstractController(AbstractController*);
private: