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authorAndreas Hansson <andreas.hansson@arm.com>2012-04-25 10:45:23 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-04-25 10:45:23 -0400
commitbeed20d7bc31512cc36304bd64876fe4af014641 (patch)
tree30e564d58b58641d09bef5eccaae37aa49dc133e /src/mem/ruby/system
parent4c92708b48d51bfb6592ff48925f5a7a0157da5b (diff)
downloadgem5-beed20d7bc31512cc36304bd64876fe4af014641.tar.xz
MEM: Use base class Master/SlavePort pointers in the bus
This patch makes some rather trivial simplifications to the bus in that it changes the use of BusMasterPort and BusSlavePort pointers to simply use MasterPort and SlavePort (iterators are also updated accordingly). This change is a step towards a future patch that introduces a separation of the interface and the structural port itself.
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