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authorNilay Vaish <nilay@cs.wisc.edu>2012-09-10 12:21:01 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2012-09-10 12:21:01 -0500
commitc5bf1390aa129fefa7102e2de2998c0e6b09b5b0 (patch)
treeabd84f95c72cc3c7652d7471fed0d8cca74a9987 /src/mem/ruby/system
parent4e6f048ef0f201718ac1a24ff917fb4d42a2b181 (diff)
downloadgem5-c5bf1390aa129fefa7102e2de2998c0e6b09b5b0.tar.xz
Ruby System: Convert to Clocked Object
This patch moves Ruby System from being a SimObject to recently introduced ClockedObject.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/RubyMemoryControl.cc4
-rw-r--r--src/mem/ruby/system/RubyPort.cc6
-rw-r--r--src/mem/ruby/system/RubySystem.py6
-rw-r--r--src/mem/ruby/system/Sequencer.cc6
-rw-r--r--src/mem/ruby/system/System.cc4
-rw-r--r--src/mem/ruby/system/System.hh8
6 files changed, 14 insertions, 20 deletions
diff --git a/src/mem/ruby/system/RubyMemoryControl.cc b/src/mem/ruby/system/RubyMemoryControl.cc
index f931e4618..cfdaaaef7 100644
--- a/src/mem/ruby/system/RubyMemoryControl.cc
+++ b/src/mem/ruby/system/RubyMemoryControl.cc
@@ -301,7 +301,7 @@ RubyMemoryControl::enqueueMemRef(MemoryNode& memRef)
DPRINTF(RubyMemory,
"New memory request%7d: %#08x %c arrived at %10d bank = %3x sched %c\n",
m_msg_counter, addr, memRef.m_is_mem_read ? 'R':'W',
- memRef.m_time * g_system_ptr->getClock(),
+ memRef.m_time * g_system_ptr->clockPeriod(),
bank, m_event.scheduled() ? 'Y':'N');
m_profiler_ptr->profileMemReq(bank);
@@ -377,7 +377,7 @@ void
RubyMemoryControl::enqueueToDirectory(MemoryNode req, int latency)
{
Time arrival_time = curTick() + (latency * clock);
- Time ruby_arrival_time = arrival_time / g_system_ptr->getClock();
+ Time ruby_arrival_time = arrival_time / g_system_ptr->clockPeriod();
req.m_time = ruby_arrival_time;
m_response_queue.push_back(req);
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index b24f649a5..d14b3dba7 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -197,8 +197,8 @@ RubyPort::M5Port::recvTimingReq(PacketPtr pkt)
pkt->getAddr());
// send next cycle
- ruby_port->pio_port.schedTimingReq(pkt, curTick() +
- g_system_ptr->getClock());
+ ruby_port->pio_port.schedTimingReq(pkt,
+ curTick() + g_system_ptr->clockPeriod());
return true;
}
@@ -651,7 +651,7 @@ RubyPort::M5Port::hitCallback(PacketPtr pkt)
if (needsResponse) {
DPRINTF(RubyPort, "Sending packet back over port\n");
// send next cycle
- schedTimingResp(pkt, curTick() + g_system_ptr->getClock());
+ schedTimingResp(pkt, curTick() + g_system_ptr->clockPeriod());
} else {
delete pkt;
}
diff --git a/src/mem/ruby/system/RubySystem.py b/src/mem/ruby/system/RubySystem.py
index d66ada4b9..c9d2e96ac 100644
--- a/src/mem/ruby/system/RubySystem.py
+++ b/src/mem/ruby/system/RubySystem.py
@@ -28,14 +28,14 @@
# Brad Beckmann
from m5.params import *
-from m5.SimObject import SimObject
+from ClockedObject import ClockedObject
-class RubySystem(SimObject):
+class RubySystem(ClockedObject):
type = 'RubySystem'
random_seed = Param.Int(1234, "random seed used by the simulation");
randomization = Param.Bool(False,
"insert random delays on message enqueue times");
- clock = Param.Clock('1GHz', "")
+ clock = '1GHz'
block_size_bytes = Param.Int(64,
"default cache block size; must be a power of two");
mem_size = Param.MemorySize("total memory size of the system");
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 01d34814f..c48ff59cf 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -129,8 +129,7 @@ Sequencer::wakeup()
if (m_outstanding_count > 0) {
// If there are still outstanding requests, keep checking
schedule(deadlockCheckEvent,
- m_deadlock_threshold * g_system_ptr->getClock() +
- curTick());
+ g_system_ptr->clockPeriod() * m_deadlock_threshold + curTick());
}
}
@@ -210,8 +209,7 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
// See if we should schedule a deadlock check
if (deadlockCheckEvent.scheduled() == false) {
schedule(deadlockCheckEvent,
- m_deadlock_threshold * g_system_ptr->getClock()
- + curTick());
+ g_system_ptr->clockPeriod() * m_deadlock_threshold + curTick());
}
Address line_addr(pkt->getAddr());
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index 7921d306d..c22272e03 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -45,7 +45,6 @@ using namespace std;
int RubySystem::m_random_seed;
bool RubySystem::m_randomization;
-Tick RubySystem::m_clock;
int RubySystem::m_block_size_bytes;
int RubySystem::m_block_size_bits;
uint64 RubySystem::m_memory_size_bytes;
@@ -56,7 +55,7 @@ Profiler* RubySystem::m_profiler_ptr;
MemoryVector* RubySystem::m_mem_vec_ptr;
RubySystem::RubySystem(const Params *p)
- : SimObject(p)
+ : ClockedObject(p)
{
if (g_system_ptr != NULL)
fatal("Only one RubySystem object currently allowed.\n");
@@ -64,7 +63,6 @@ RubySystem::RubySystem(const Params *p)
m_random_seed = p->random_seed;
srandom(m_random_seed);
m_randomization = p->randomization;
- m_clock = p->clock;
m_block_size_bytes = p->block_size_bytes;
assert(isPowerOf2(m_block_size_bytes));
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index e6501f7bf..7426894d8 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -42,13 +42,13 @@
#include "mem/ruby/system/MemoryVector.hh"
#include "mem/ruby/system/SparseMemory.hh"
#include "params/RubySystem.hh"
-#include "sim/sim_object.hh"
+#include "sim/clocked_object.hh"
class Network;
class Profiler;
class MemoryControl;
-class RubySystem : public SimObject
+class RubySystem : public ClockedObject
{
public:
class RubyEvent : public Event
@@ -77,8 +77,7 @@ class RubySystem : public SimObject
static int getBlockSizeBits() { return m_block_size_bits; }
static uint64 getMemorySizeBytes() { return m_memory_size_bytes; }
static int getMemorySizeBits() { return m_memory_size_bits; }
- Tick getTime() const { return curTick() / m_clock; }
- Tick getClock() const { return m_clock; }
+ Cycles getTime() const { return curCycle(); }
// Public Methods
static Network*
@@ -145,7 +144,6 @@ class RubySystem : public SimObject
// configuration parameters
static int m_random_seed;
static bool m_randomization;
- static Tick m_clock;
static int m_block_size_bytes;
static int m_block_size_bits;
static uint64 m_memory_size_bytes;