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authorNilay Vaish <nilay@cs.wisc.edu>2015-08-27 12:51:40 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-08-27 12:51:40 -0500
commitfc3d34a4889f96395d7d3185a0c5a2dbb5c77343 (patch)
tree2b5eccd49fab300132e4e4ccf0796cb437295a8e /src/mem/ruby/system
parent88b1fd82a6207c38845c3503ab3037ed40225d80 (diff)
downloadgem5-fc3d34a4889f96395d7d3185a0c5a2dbb5c77343.tar.xz
ruby: handle llsc accesses through CacheEntry, not CacheMemory
The sequencer takes care of llsc accesses by calling upon functions from the CacheMemory. This is unnecessary once the required CacheEntry object is available. Thus some of the calls to findTagInSet() are avoided.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/Sequencer.cc30
1 files changed, 14 insertions, 16 deletions
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 305758798..b21c70743 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -317,28 +317,27 @@ Sequencer::removeRequest(SequencerRequest* srequest)
void
Sequencer::invalidateSC(Addr address)
{
- RequestTable::iterator i = m_writeRequestTable.find(address);
- if (i != m_writeRequestTable.end()) {
- SequencerRequest* request = i->second;
- // The controller has lost the coherence permissions, hence the lock
- // on the cache line maintained by the cache should be cleared.
- if (request->m_type == RubyRequestType_Store_Conditional) {
- m_dataCache_ptr->clearLocked(address);
- }
+ AbstractCacheEntry *e = m_dataCache_ptr->lookup(address);
+ // The controller has lost the coherence permissions, hence the lock
+ // on the cache line maintained by the cache should be cleared.
+ if (e && e->isLocked(m_version)) {
+ e->clearLocked();
}
}
bool
Sequencer::handleLlsc(Addr address, SequencerRequest* request)
{
- //
+ AbstractCacheEntry *e = m_dataCache_ptr->lookup(address);
+ if (!e)
+ return true;
+
// The success flag indicates whether the LLSC operation was successful.
// LL ops will always succeed, but SC may fail if the cache line is no
// longer locked.
- //
bool success = true;
if (request->m_type == RubyRequestType_Store_Conditional) {
- if (!m_dataCache_ptr->isLocked(address, m_version)) {
+ if (!e->isLocked(m_version)) {
//
// For failed SC requests, indicate the failure to the cpu by
// setting the extra data to zero.
@@ -355,19 +354,18 @@ Sequencer::handleLlsc(Addr address, SequencerRequest* request)
//
// Independent of success, all SC operations must clear the lock
//
- m_dataCache_ptr->clearLocked(address);
+ e->clearLocked();
} else if (request->m_type == RubyRequestType_Load_Linked) {
//
// Note: To fully follow Alpha LLSC semantics, should the LL clear any
// previously locked cache lines?
//
- m_dataCache_ptr->setLocked(address, m_version);
- } else if ((m_dataCache_ptr->isTagPresent(address)) &&
- (m_dataCache_ptr->isLocked(address, m_version))) {
+ e->setLocked(m_version);
+ } else if (e->isLocked(m_version)) {
//
// Normal writes should clear the locked address
//
- m_dataCache_ptr->clearLocked(address);
+ e->clearLocked();
}
return success;
}