diff options
author | Nathan Binkert <nate@binkert.org> | 2009-07-06 15:49:47 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2009-07-06 15:49:47 -0700 |
commit | a7904e2cf341d5452c5622adfcbdcd268d4ab7d1 (patch) | |
tree | 76c744e731c275b393130b869c2c2944807a77af /src/mem/ruby/system | |
parent | 5b080ae0463c9644eb81bd923e25139dfe787e6e (diff) | |
download | gem5-a7904e2cf341d5452c5622adfcbdcd268d4ab7d1.tar.xz |
ruby: apply some fixes that were overwritten by the recent ruby import.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/CacheMemory.hh | 1 | ||||
-rw-r--r-- | src/mem/ruby/system/MemoryControl.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/system/System.cc | 7 |
4 files changed, 3 insertions, 7 deletions
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh index 4d46ac908..941073ad2 100644 --- a/src/mem/ruby/system/CacheMemory.hh +++ b/src/mem/ruby/system/CacheMemory.hh @@ -333,7 +333,6 @@ inline Index CacheMemory::addressToCacheSet(const Address& address) const { assert(address == line_address(address)); - Index temp = -1; return address.bitSelect(RubySystem::getBlockSizeBits(), RubySystem::getBlockSizeBits() + m_cache_num_set_bits-1); } diff --git a/src/mem/ruby/system/MemoryControl.cc b/src/mem/ruby/system/MemoryControl.cc index f9159ed3e..2ef7d8ffc 100644 --- a/src/mem/ruby/system/MemoryControl.cc +++ b/src/mem/ruby/system/MemoryControl.cc @@ -291,7 +291,6 @@ void MemoryControl::enqueueMemRef (MemoryNode& memRef) { Time arrival_time = memRef.m_time; uint64 at = arrival_time; bool is_mem_read = memRef.m_is_mem_read; - bool dirtyWB = memRef.m_is_dirty_wb; physical_address_t addr = memRef.m_addr; int bank = getBank(addr); if (m_debug) { diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index ff5ce1506..97416d2d3 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -277,7 +277,6 @@ void Sequencer::readCallback(const Address& address, DataBlock& data) { void Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data) { const RubyRequest & ruby_request = srequest->ruby_request; - int size = ruby_request.len; Address request_address(ruby_request.paddr); Address request_line_address(ruby_request.paddr); request_line_address.makeLineAddress(); diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index 9d1119f01..e922d0bbf 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -130,7 +130,7 @@ RubySystem::RubySystem(const vector <RubyObjConf> & sys_conf) const string & type = sys_conf[i].type; const string & name = sys_conf[i].name; const vector<string> & argv = sys_conf[i].argv; - if (type == "RubySystem") { + if (type == "System") { init(argv); // initialize system-wide variables before doing anything else! } else if (type == "Debug") { g_debug_ptr = new Debug(name, argv); @@ -151,8 +151,7 @@ RubySystem::RubySystem(const vector <RubyObjConf> & sys_conf) for (size_t i=0;i<sys_conf.size(); i++) { const string & type = sys_conf[i].type; const string & name = sys_conf[i].name; - const vector<string> & argv = sys_conf[i].argv; - if (type == "RubySystem" || type == "Debug") + if (type == "System" || type == "Debug") continue; else if (type == "SetAssociativeCache") m_caches[name] = new CacheMemory(name); @@ -225,7 +224,7 @@ RubySystem::RubySystem(const vector <RubyObjConf> & sys_conf) string type = sys_conf[i].type; string name = sys_conf[i].name; const vector<string> & argv = sys_conf[i].argv; - if (type == "RubySystem" || type == "Debug") + if (type == "System" || type == "Debug") continue; else if (type == "SetAssociativeCache") m_caches[name]->init(argv); |