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authorAndreas Hansson <andreas.hansson@arm.com>2012-07-09 12:35:34 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-07-09 12:35:34 -0400
commit46d9adb68c96b94ae25bbe92d34e375daf532ece (patch)
tree8a0792d1d67958eeb65ee978edc5217e2b499ae7 /src/mem/ruby/system
parent830391cad9764b923edd8f761e9fe5d11fd9d837 (diff)
downloadgem5-46d9adb68c96b94ae25bbe92d34e375daf532ece.tar.xz
Port: Make getAddrRanges const
This patch makes getAddrRanges const throughout the code base. There is no reason why it should not be, and making it const prevents adding any unintentional side-effects.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/RubyPort.cc2
-rw-r--r--src/mem/ruby/system/RubyPort.hh2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 285017a06..a6eb4d22d 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -669,7 +669,7 @@ RubyPort::PioPort::sendNextCycle(PacketPtr pkt)
}
AddrRangeList
-RubyPort::M5Port::getAddrRanges()
+RubyPort::M5Port::getAddrRanges() const
{
// at the moment the assumption is that the master does not care
AddrRangeList ranges;
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 8833efb6e..3b19632e2 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -86,7 +86,7 @@ class RubyPort : public MemObject
virtual bool recvTimingReq(PacketPtr pkt);
virtual Tick recvAtomic(PacketPtr pkt);
virtual void recvFunctional(PacketPtr pkt);
- virtual AddrRangeList getAddrRanges();
+ virtual AddrRangeList getAddrRanges() const;
private:
bool isPhysMemAddress(Addr addr);