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author | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
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committer | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
commit | 3444d5f359bdef91ecebb33c6c241c8e6c673dc0 (patch) | |
tree | f569d29856c8da00df25a1d3467328901eaa594f /src/mem/ruby/system | |
parent | 8f71e667b3d1e9e9eea49ea7e6420a36017f4441 (diff) | |
download | gem5-3444d5f359bdef91ecebb33c6c241c8e6c673dc0.tar.xz |
mem: Hit callback delay fix
This patch was created by Bihn Pham during his internship at AMD.
There is no need to delay hit callback response messages by a cycle because
the response latency is already incurred in the Ruby protocol. This ensures
correct timing of memory instructions.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index 2974d07a4..83be9337a 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -469,8 +469,10 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt) // turn packet around to go back to requester if response expected if (needsResponse) { DPRINTF(RubyPort, "Sending packet back over port\n"); - // send next cycle - schedTimingResp(pkt, curTick() + rs->clockPeriod()); + // Send a response in the same cycle. There is no need to delay the + // response because the response latency is already incurred in the + // Ruby protocol. + schedTimingResp(pkt, curTick()); } else { delete pkt; } |