diff options
author | Brandon Potter <brandon.potter@amd.com> | 2015-07-10 16:05:23 -0500 |
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committer | Brandon Potter <brandon.potter@amd.com> | 2015-07-10 16:05:23 -0500 |
commit | 9eda4bdc5a947883a2d55ab860d37c5cd80c3370 (patch) | |
tree | 0dc23e2bdca0338129ba473e259f891a2edb15c1 /src/mem/ruby/system | |
parent | a74c446e7d034cebe01babb92f448a145b4ba77d (diff) | |
download | gem5-9eda4bdc5a947883a2d55ab860d37c5cd80c3370.tar.xz |
ruby: remove extra whitespace and correct misspelled words
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r-- | src/mem/ruby/system/DMASequencer.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 4 | ||||
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/system/System.cc | 10 |
4 files changed, 9 insertions, 9 deletions
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index 05592b231..646601ad4 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -304,7 +304,7 @@ DMASequencer::issueNext() assert(m_mandatory_q_ptr != NULL); m_mandatory_q_ptr->enqueue(msg); active_request.bytes_issued += msg->getLen(); - DPRINTF(RubyDma, + DPRINTF(RubyDma, "DMA request bytes issued %d, bytes completed %d, total len %d\n", active_request.bytes_issued, active_request.bytes_completed, active_request.len); diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index d34cb3c2f..94f0c0966 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -363,7 +363,7 @@ RubyPort::ruby_hit_callback(PacketPtr pkt) if (!retryList.empty()) { // // Record the current list of ports to retry on a temporary list before - // calling sendRetry on those ports. sendRetry will cause an + // calling sendRetry on those ports. sendRetry will cause an // immediate retry, which may result in the ports being put back on the // list. Therefore we want to clear the retryList before calling // sendRetry. @@ -422,7 +422,7 @@ RubyPort::MemSlavePort::hitCallback(PacketPtr pkt) { bool needsResponse = pkt->needsResponse(); - // Unless specified at configuraiton, all responses except failed SC + // Unless specified at configuraiton, all responses except failed SC // and Flush operations access M5 physical memory. bool accessPhysMem = access_backing_store; diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 0a48817ca..a5e26b800 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -347,7 +347,7 @@ Sequencer::handleLlsc(const Address& address, SequencerRequest* request) } else { // // For successful SC requests, indicate the success to the cpu by - // setting the extra data to one. + // setting the extra data to one. // request->pkt->req->setExtraData(1); } diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc index 9d63643cc..2f1d9013c 100644 --- a/src/mem/ruby/system/System.cc +++ b/src/mem/ruby/system/System.cc @@ -86,16 +86,16 @@ RubySystem::RubySystem(const Params *p) void RubySystem::registerNetwork(Network* network_ptr) { - m_network = network_ptr; + m_network = network_ptr; } void RubySystem::registerAbstractController(AbstractController* cntrl) { - m_abs_cntrl_vec.push_back(cntrl); + m_abs_cntrl_vec.push_back(cntrl); - MachineID id = cntrl->getMachineID(); - g_abs_controls[id.getType()][id.getNum()] = cntrl; + MachineID id = cntrl->getMachineID(); + g_abs_controls[id.getType()][id.getNum()] = cntrl; } RubySystem::~RubySystem() @@ -189,7 +189,7 @@ RubySystem::serializeOld(CheckpointOut &cp) // Restore curTick setCurTick(curtick_original); - // Aggergate the trace entries together into a single array + // Aggregate the trace entries together into a single array uint8_t *raw_data = new uint8_t[4096]; uint64 cache_trace_size = m_cache_recorder->aggregateRecords(&raw_data, 4096); |