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authorNilay Vaish <nilay@cs.wisc.edu>2014-11-06 05:42:20 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-11-06 05:42:20 -0600
commitd25b722e4a9500f2d4b2ca937900bf093242ddfa (patch)
tree8eaa415786c9f2ac2ffff67799068381fdbaf90f /src/mem/ruby/system
parent0baaed60ab961b8eb3399ee2c34adeea7335f5b3 (diff)
downloadgem5-d25b722e4a9500f2d4b2ca937900bf093242ddfa.tar.xz
ruby: coherence protocols: remove data block from dirctory entry
This patch removes the data block present in the directory entry structure of each protocol in gem5's mainline. Firstly, this is required for moving towards common set of memory controllers for classic and ruby memory systems. Secondly, the data block was being misused in several places. It was being used for having free access to the physical memory instead of calling on the memory controller. From now on, the directory controller will not have a direct visibility into the physical memory. The Memory Vector object now resides in the Memory Controller class. This also means that some significant changes are being made to the functional accesses in ruby.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/System.cc45
1 files changed, 5 insertions, 40 deletions
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index edc739b85..8bcc87474 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -427,10 +427,6 @@ RubySystem::functionalRead(PacketPtr pkt)
}
assert(num_rw <= 1);
- uint8_t *data = pkt->getPtr<uint8_t>(true);
- unsigned int size_in_bytes = pkt->getSize();
- unsigned startByte = address.getAddress() - line_address.getAddress();
-
// This if case is meant to capture what happens in a Broadcast/Snoop
// protocol where the block does not exist in the cache hierarchy. You
// only want to read from the Backing_Store memory if there is no copy in
@@ -439,20 +435,12 @@ RubySystem::functionalRead(PacketPtr pkt)
// The reason is because the Backing_Store memory could easily be stale, if
// there are copies floating around the cache hierarchy, so you want to read
// it only if it's not in the cache hierarchy at all.
- if (num_invalid == (num_controllers - 1) &&
- num_backing_store == 1) {
+ if (num_invalid == (num_controllers - 1) && num_backing_store == 1) {
DPRINTF(RubySystem, "only copy in Backing_Store memory, read from it\n");
for (unsigned int i = 0; i < num_controllers; ++i) {
access_perm = m_abs_cntrl_vec[i]->getAccessPermission(line_address);
if (access_perm == AccessPermission_Backing_Store) {
- DataBlock& block = m_abs_cntrl_vec[i]->
- getDataBlock(line_address);
-
- DPRINTF(RubySystem, "reading from %s block %s\n",
- m_abs_cntrl_vec[i]->name(), block);
- for (unsigned j = 0; j < size_in_bytes; ++j) {
- data[j] = block.getByte(j + startByte);
- }
+ m_abs_cntrl_vec[i]->functionalRead(line_address, pkt);
return true;
}
}
@@ -470,14 +458,7 @@ RubySystem::functionalRead(PacketPtr pkt)
access_perm = m_abs_cntrl_vec[i]->getAccessPermission(line_address);
if (access_perm == AccessPermission_Read_Only ||
access_perm == AccessPermission_Read_Write) {
- DataBlock& block = m_abs_cntrl_vec[i]->
- getDataBlock(line_address);
-
- DPRINTF(RubySystem, "reading from %s block %s\n",
- m_abs_cntrl_vec[i]->name(), block);
- for (unsigned j = 0; j < size_in_bytes; ++j) {
- data[j] = block.getByte(j + startByte);
- }
+ m_abs_cntrl_vec[i]->functionalRead(line_address, pkt);
return true;
}
}
@@ -500,10 +481,6 @@ RubySystem::functionalWrite(PacketPtr pkt)
DPRINTF(RubySystem, "Functional Write request for %s\n",addr);
- uint8_t *data = pkt->getPtr<uint8_t>(true);
- unsigned int size_in_bytes = pkt->getSize();
- unsigned startByte = addr.getAddress() - line_addr.getAddress();
-
uint32_t M5_VAR_USED num_functional_writes = 0;
for (unsigned int i = 0; i < num_controllers;++i) {
@@ -513,23 +490,11 @@ RubySystem::functionalWrite(PacketPtr pkt)
access_perm = m_abs_cntrl_vec[i]->getAccessPermission(line_addr);
if (access_perm != AccessPermission_Invalid &&
access_perm != AccessPermission_NotPresent) {
-
- num_functional_writes++;
-
- DataBlock& block = m_abs_cntrl_vec[i]->getDataBlock(line_addr);
- DPRINTF(RubySystem, "%s\n",block);
- for (unsigned j = 0; j < size_in_bytes; ++j) {
- block.setByte(j + startByte, data[j]);
- }
- DPRINTF(RubySystem, "%s\n",block);
+ num_functional_writes +=
+ m_abs_cntrl_vec[i]->functionalWrite(line_addr, pkt);
}
}
- for (unsigned int i = 0; i < m_memory_controller_vec.size() ;++i) {
- num_functional_writes +=
- m_memory_controller_vec[i]->functionalWriteBuffers(pkt);
- }
-
num_functional_writes += m_network->functionalWrite(pkt);
DPRINTF(RubySystem, "Messages written = %u\n", num_functional_writes);