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authorBrad Beckmann <Brad.Beckmann@amd.com>2009-11-18 16:34:31 -0800
committerBrad Beckmann <Brad.Beckmann@amd.com>2009-11-18 16:34:31 -0800
commit2783a7b9ad90d04d74418d7463c255c29ffd8046 (patch)
tree8ec014b0f6607795faa96b980f8ec1947352bd78 /src/mem/ruby/system
parent7b8fcecf11813492d770a0d766fb9a9fb01be3e2 (diff)
downloadgem5-2783a7b9ad90d04d74418d7463c255c29ffd8046.tar.xz
ruby: returns the number of LLC needed for broadcast
Added feature to CacheMemory to return the number of last level caches. This count is need for broadcast protocols such as MOESI_hammer.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/CacheMemory.cc18
-rw-r--r--src/mem/ruby/system/CacheMemory.hh4
2 files changed, 22 insertions, 0 deletions
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc
index a5c881a61..630b94542 100644
--- a/src/mem/ruby/system/CacheMemory.cc
+++ b/src/mem/ruby/system/CacheMemory.cc
@@ -28,6 +28,9 @@
#include "mem/ruby/system/CacheMemory.hh"
+int CacheMemory::m_num_last_level_caches = 0;
+MachineType CacheMemory::m_last_level_machine_type = MachineType_FIRST;
+
// Output operator declaration
//ostream& operator<<(ostream& out, const CacheMemory<ENTRY>& obj);
@@ -55,6 +58,8 @@ void CacheMemory::init(const vector<string> & argv)
int cache_size = -1;
string policy;
+ m_num_last_level_caches =
+ MachineType_base_count(MachineType_FIRST);
m_controller = NULL;
for (uint32 i=0; i<argv.size(); i+=2) {
if (argv[i] == "size") {
@@ -67,6 +72,12 @@ void CacheMemory::init(const vector<string> & argv)
policy = argv[i+1];
} else if (argv[i] == "controller") {
m_controller = RubySystem::getController(argv[i+1]);
+ if (m_last_level_machine_type < m_controller->getMachineType()) {
+ m_num_last_level_caches =
+ MachineType_base_count(m_controller->getMachineType());
+ m_last_level_machine_type =
+ m_controller->getMachineType();
+ }
} else {
cerr << "WARNING: CacheMemory: Unknown configuration parameter: " << argv[i] << endl;
}
@@ -110,6 +121,13 @@ CacheMemory::~CacheMemory()
}
}
+int
+CacheMemory::numberOfLastLevelCaches()
+{
+ return m_num_last_level_caches;
+}
+
+
void CacheMemory::printConfig(ostream& out)
{
out << "Cache config: " << m_cache_name << endl;
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index 00cd8ae35..856b7bcac 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -70,6 +70,8 @@ public:
// static CacheMemory* createCache(int level, int num, char split_type, AbstractCacheEntry* (*entry_factory)());
// static CacheMemory* getCache(int cache_id);
+ static int numberOfLastLevelCaches();
+
// Public Methods
void printConfig(ostream& out);
@@ -167,6 +169,8 @@ private:
int m_cache_num_set_bits;
int m_cache_assoc;
+ static int m_num_last_level_caches;
+ static MachineType m_last_level_machine_type;
static Vector< CacheMemory* > m_all_caches;
};