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authorNilay Vaish <nilay@cs.wisc.edu>2013-06-09 07:29:59 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2013-06-09 07:29:59 -0500
commitf59a7af50a7309944abfe1997057f52591619635 (patch)
tree4daa578b6ba1664152da4412786317bce26ff0ee /src/mem/ruby/system
parent38736ce7c33d7b1bf1e982f5d8cacd13908a32f4 (diff)
downloadgem5-f59a7af50a7309944abfe1997057f52591619635.tar.xz
ruby: stats: use gem5's stats for cache and memory controllers
This moves event and transition count statistics for cache controllers to gem5's statistics. It does the same for the statistics associated with the memory controller in ruby. All the cache/directory/dma controllers individually collect the event and transition counts. A callback function, collateStats(), has been added that is invoked on the controller version 0 of each controller class. This function adds all the individual controller statistics to a vector variables. All the code for registering the statistical variables and collating them is generated by SLICC. The patch removes the files *_Profiler.{cc,hh} and *_ProfileDumper.{cc,hh} which were earlier used for collecting and dumping statistics respectively.
Diffstat (limited to 'src/mem/ruby/system')
-rw-r--r--src/mem/ruby/system/MemoryControl.hh3
-rw-r--r--src/mem/ruby/system/RubyMemoryControl.cc19
-rw-r--r--src/mem/ruby/system/RubyMemoryControl.hh3
3 files changed, 8 insertions, 17 deletions
diff --git a/src/mem/ruby/system/MemoryControl.hh b/src/mem/ruby/system/MemoryControl.hh
index daa5b61fc..6dc32b661 100644
--- a/src/mem/ruby/system/MemoryControl.hh
+++ b/src/mem/ruby/system/MemoryControl.hh
@@ -75,9 +75,6 @@ class MemoryControl : public ClockedObject, public Consumer
virtual bool areNSlotsAvailable(int n) = 0; // infinite queue length
virtual void print(std::ostream& out) const = 0;
- virtual void clearStats() const = 0;
- virtual void printStats(std::ostream& out) const = 0;
-
virtual void regStats() {};
virtual const int getChannel(const physical_address_t addr) const = 0;
diff --git a/src/mem/ruby/system/RubyMemoryControl.cc b/src/mem/ruby/system/RubyMemoryControl.cc
index 5ffc60e2b..84126a8f5 100644
--- a/src/mem/ruby/system/RubyMemoryControl.cc
+++ b/src/mem/ruby/system/RubyMemoryControl.cc
@@ -221,6 +221,7 @@ RubyMemoryControl::init()
m_tfaw_count[i] = 0;
}
}
+
void
RubyMemoryControl::reset()
{
@@ -359,18 +360,6 @@ RubyMemoryControl::print(ostream& out) const
{
}
-void
-RubyMemoryControl::clearStats() const
-{
- m_profiler_ptr->clearStats();
-}
-
-void
-RubyMemoryControl::printStats(ostream& out) const
-{
- m_profiler_ptr->printStats(out);
-}
-
// Queue up a completed request to send back to directory
void
RubyMemoryControl::enqueueToDirectory(MemoryNode req, Cycles latency)
@@ -789,6 +778,12 @@ RubyMemoryControl::functionalWriteBuffers(Packet *pkt)
return num_functional_writes;
}
+void
+RubyMemoryControl::regStats()
+{
+ m_profiler_ptr->regStats();
+}
+
RubyMemoryControl *
RubyMemoryControlParams::create()
{
diff --git a/src/mem/ruby/system/RubyMemoryControl.hh b/src/mem/ruby/system/RubyMemoryControl.hh
index d0dfa5b8d..7be74583a 100644
--- a/src/mem/ruby/system/RubyMemoryControl.hh
+++ b/src/mem/ruby/system/RubyMemoryControl.hh
@@ -81,8 +81,7 @@ class RubyMemoryControl : public MemoryControl
bool areNSlotsAvailable(int n) { return true; }; // infinite queue length
void print(std::ostream& out) const;
- void clearStats() const;
- void printStats(std::ostream& out) const;
+ void regStats();
const int getBank(const physical_address_t addr) const;
const int getRank(const physical_address_t addr) const;