ruby: move all statistics to stats.txt, eliminate ruby.stats

8 files changed, 206 insertions, 231 deletions

diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 1e9336d76..f8c21c91a 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -136,7 +136,7 @@ class RubyPort : public MemObject
     // A pointer to the controller is needed for atomic support.
     //
     void setController(AbstractController* _cntrl) { m_controller = _cntrl; }
-    int getId() { return m_version; }
+    uint32_t getId() { return m_version; }
     unsigned int drain(DrainManager *dm);
 
   protected:
@@ -145,7 +145,7 @@ class RubyPort : public MemObject
     void testDrainComplete();
     void ruby_eviction_callback(const Address& address);
 
-    int m_version;
+    uint32_t m_version;
     AbstractController* m_controller;
     MessageBuffer* m_mandatory_q_ptr;
     PioPort pio_port;
diff --git a/src/mem/ruby/system/RubySystem.py b/src/mem/ruby/system/RubySystem.py
index 29e395404..0943fb3f6 100644
--- a/src/mem/ruby/system/RubySystem.py
+++ b/src/mem/ruby/system/RubySystem.py
@@ -39,6 +39,9 @@ class RubySystem(ClockedObject):
     block_size_bytes = Param.UInt32(64,
         "default cache block size; must be a power of two");
     mem_size = Param.MemorySize("total memory size of the system");
-    stats_filename = Param.String("ruby.stats",
-        "file to which ruby dumps its stats")
     no_mem_vec = Param.Bool(False, "do not allocate Ruby's mem vector");
+
+    # Profiler related configuration variables
+    hot_lines = Param.Bool(False, "")
+    all_instructions = Param.Bool(False, "")
+    num_of_sequencers = Param.Int("")
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 8e61766b8..be554d5cf 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -55,13 +55,8 @@ RubySequencerParams::create()
 }
 
 Sequencer::Sequencer(const Params *p)
-    : RubyPort(p), deadlockCheckEvent(this)
+    : RubyPort(p), m_IncompleteTimes(MachineType_NUM), deadlockCheckEvent(this)
 {
-    m_store_waiting_on_load_cycles = 0;
-    m_store_waiting_on_store_cycles = 0;
-    m_load_waiting_on_store_cycles = 0;
-    m_load_waiting_on_load_cycles = 0;
-
     m_outstanding_count = 0;
 
     m_instCache_ptr = p->icache;
@@ -133,81 +128,35 @@ Sequencer::wakeup()
     }
 }
 
-void Sequencer::clearStats()
+void Sequencer::resetStats()
 {
-    m_outstandReqHist.clear();
-
-    // Initialize the histograms that track latency of all requests
-    m_latencyHist.clear(20);
-    m_typeLatencyHist.resize(RubyRequestType_NUM);
-    for (int i = 0; i < RubyRequestType_NUM; i++) {
-        m_typeLatencyHist[i].clear(20);
-    }
-
-    // Initialize the histograms that track latency of requests that
-    // hit in the cache attached to the sequencer.
-    m_hitLatencyHist.clear(20);
-    m_hitTypeLatencyHist.resize(RubyRequestType_NUM);
-    m_hitTypeMachLatencyHist.resize(RubyRequestType_NUM);
-
+    m_latencyHist.reset();
+    m_hitLatencyHist.reset();
+    m_missLatencyHist.reset();
     for (int i = 0; i < RubyRequestType_NUM; i++) {
-        m_hitTypeLatencyHist[i].clear(20);
-        m_hitTypeMachLatencyHist[i].resize(MachineType_NUM);
+        m_typeLatencyHist[i]->reset();
+        m_hitTypeLatencyHist[i]->reset();
+        m_missTypeLatencyHist[i]->reset();
         for (int j = 0; j < MachineType_NUM; j++) {
-            m_hitTypeMachLatencyHist[i][j].clear(20);
+            m_hitTypeMachLatencyHist[i][j]->reset();
+            m_missTypeMachLatencyHist[i][j]->reset();
         }
     }
 
-    // Initialize the histograms that track the latency of requests that
-    // missed in the cache attached to the sequencer.
-    m_missLatencyHist.clear(20);
-    m_missTypeLatencyHist.resize(RubyRequestType_NUM);
-    m_missTypeMachLatencyHist.resize(RubyRequestType_NUM);
-
-    for (int i = 0; i < RubyRequestType_NUM; i++) {
-        m_missTypeLatencyHist[i].clear(20);
-        m_missTypeMachLatencyHist[i].resize(MachineType_NUM);
-        for (int j = 0; j < MachineType_NUM; j++) {
-            m_missTypeMachLatencyHist[i][j].clear(20);
-        }
-    }
-
-    m_hitMachLatencyHist.resize(MachineType_NUM);
-    m_missMachLatencyHist.resize(MachineType_NUM);
-    m_IssueToInitialDelayHist.resize(MachineType_NUM);
-    m_InitialToForwardDelayHist.resize(MachineType_NUM);
-    m_ForwardToFirstResponseDelayHist.resize(MachineType_NUM);
-    m_FirstResponseToCompletionDelayHist.resize(MachineType_NUM);
-    m_IncompleteTimes.resize(MachineType_NUM);
-
     for (int i = 0; i < MachineType_NUM; i++) {
-        m_missMachLatencyHist[i].clear(20);
-        m_hitMachLatencyHist[i].clear(20);
+        m_missMachLatencyHist[i]->reset();
+        m_hitMachLatencyHist[i]->reset();
 
-        m_IssueToInitialDelayHist[i].clear(20);
-        m_InitialToForwardDelayHist[i].clear(20);
-        m_ForwardToFirstResponseDelayHist[i].clear(20);
-        m_FirstResponseToCompletionDelayHist[i].clear(20);
+        m_IssueToInitialDelayHist[i]->reset();
+        m_InitialToForwardDelayHist[i]->reset();
+        m_ForwardToFirstResponseDelayHist[i]->reset();
+        m_FirstResponseToCompletionDelayHist[i]->reset();
 
         m_IncompleteTimes[i] = 0;
     }
 }
 
 void
-Sequencer::printStats(ostream & out) const
-{
-    out << "Sequencer: " << m_name << endl
-        << "  store_waiting_on_load_cycles: "
-        << m_store_waiting_on_load_cycles << endl
-        << "  store_waiting_on_store_cycles: "
-        << m_store_waiting_on_store_cycles << endl
-        << "  load_waiting_on_load_cycles: "
-        << m_load_waiting_on_load_cycles << endl
-        << "  load_waiting_on_store_cycles: "
-        << m_load_waiting_on_store_cycles << endl;
-}
-
-void
 Sequencer::printProgress(ostream& out) const
 {
 #if 0
@@ -291,7 +240,7 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
         // Check if there is any outstanding read request for the same
         // cache line.
         if (m_readRequestTable.count(line_addr) > 0) {
-            m_store_waiting_on_load_cycles++;
+            m_store_waiting_on_load++;
             return RequestStatus_Aliased;
         }
 
@@ -303,14 +252,14 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
             m_outstanding_count++;
         } else {
           // There is an outstanding write request for the cache line
-          m_store_waiting_on_store_cycles++;
+          m_store_waiting_on_store++;
           return RequestStatus_Aliased;
         }
     } else {
         // Check if there is any outstanding write request for the same
         // cache line.
         if (m_writeRequestTable.count(line_addr) > 0) {
-            m_load_waiting_on_store_cycles++;
+            m_load_waiting_on_store++;
             return RequestStatus_Aliased;
         }
 
@@ -323,12 +272,12 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
             m_outstanding_count++;
         } else {
             // There is an outstanding read request for the cache line
-            m_load_waiting_on_load_cycles++;
+            m_load_waiting_on_load++;
             return RequestStatus_Aliased;
         }
     }
 
-    m_outstandReqHist.add(m_outstanding_count);
+    m_outstandReqHist.sample(m_outstanding_count);
     assert(m_outstanding_count ==
         (m_writeRequestTable.size() + m_readRequestTable.size()));
 
@@ -432,41 +381,41 @@ Sequencer::recordMissLatency(const Cycles cycles, const RubyRequestType type,
                              Cycles forwardRequestTime,
                              Cycles firstResponseTime, Cycles completionTime)
 {
-    m_latencyHist.add(cycles);
-    m_typeLatencyHist[type].add(cycles);
+    m_latencyHist.sample(cycles);
+    m_typeLatencyHist[type]->sample(cycles);
 
     if (isExternalHit) {
-        m_missLatencyHist.add(cycles);
-        m_missTypeLatencyHist[type].add(cycles);
+        m_missLatencyHist.sample(cycles);
+        m_missTypeLatencyHist[type]->sample(cycles);
 
         if (respondingMach != MachineType_NUM) {
-            m_missMachLatencyHist[respondingMach].add(cycles);
-            m_missTypeMachLatencyHist[type][respondingMach].add(cycles);
+            m_missMachLatencyHist[respondingMach]->sample(cycles);
+            m_missTypeMachLatencyHist[type][respondingMach]->sample(cycles);
 
             if ((issuedTime <= initialRequestTime) &&
                 (initialRequestTime <= forwardRequestTime) &&
                 (forwardRequestTime <= firstResponseTime) &&
                 (firstResponseTime <= completionTime)) {
 
-                m_IssueToInitialDelayHist[respondingMach].add(
+                m_IssueToInitialDelayHist[respondingMach]->sample(
                     initialRequestTime - issuedTime);
-                m_InitialToForwardDelayHist[respondingMach].add(
+                m_InitialToForwardDelayHist[respondingMach]->sample(
                     forwardRequestTime - initialRequestTime);
-                m_ForwardToFirstResponseDelayHist[respondingMach].add(
+                m_ForwardToFirstResponseDelayHist[respondingMach]->sample(
                     firstResponseTime - forwardRequestTime);
-                m_FirstResponseToCompletionDelayHist[respondingMach].add(
+                m_FirstResponseToCompletionDelayHist[respondingMach]->sample(
                     completionTime - firstResponseTime);
             } else {
                 m_IncompleteTimes[respondingMach]++;
             }
         }
     } else {
-        m_hitLatencyHist.add(cycles);
-        m_hitTypeLatencyHist[type].add(cycles);
+        m_hitLatencyHist.sample(cycles);
+        m_hitTypeLatencyHist[type]->sample(cycles);
 
         if (respondingMach != MachineType_NUM) {
-            m_hitMachLatencyHist[respondingMach].add(cycles);
-            m_hitTypeMachLatencyHist[type][respondingMach].add(cycles);
+            m_hitMachLatencyHist[respondingMach]->sample(cycles);
+            m_hitTypeMachLatencyHist[type][respondingMach]->sample(cycles);
         }
     }
 }
@@ -810,3 +759,76 @@ Sequencer::evictionCallback(const Address& address)
 {
     ruby_eviction_callback(address);
 }
+
+void
+Sequencer::regStats()
+{
+    m_store_waiting_on_load
+        .name(name() + ".store_waiting_on_load")
+        .desc("Number of times a store aliased with a pending load")
+        .flags(Stats::nozero);
+    m_store_waiting_on_store
+        .name(name() + ".store_waiting_on_store")
+        .desc("Number of times a store aliased with a pending store")
+        .flags(Stats::nozero);
+    m_load_waiting_on_load
+        .name(name() + ".load_waiting_on_load")
+        .desc("Number of times a load aliased with a pending load")
+        .flags(Stats::nozero);
+    m_load_waiting_on_store
+        .name(name() + ".load_waiting_on_store")
+        .desc("Number of times a load aliased with a pending store")
+        .flags(Stats::nozero);
+
+    // These statistical variables are not for display.
+    // The profiler will collate these across different
+    // sequencers and display those collated statistics.
+    m_outstandReqHist.init(10);
+    m_latencyHist.init(10);
+    m_hitLatencyHist.init(10);
+    m_missLatencyHist.init(10);
+
+    for (int i = 0; i < RubyRequestType_NUM; i++) {
+        m_typeLatencyHist.push_back(new Stats::Histogram());
+        m_typeLatencyHist[i]->init(10);
+
+        m_hitTypeLatencyHist.push_back(new Stats::Histogram());
+        m_hitTypeLatencyHist[i]->init(10);
+
+        m_missTypeLatencyHist.push_back(new Stats::Histogram());
+        m_missTypeLatencyHist[i]->init(10);
+    }
+
+    for (int i = 0; i < MachineType_NUM; i++) {
+        m_hitMachLatencyHist.push_back(new Stats::Histogram());
+        m_hitMachLatencyHist[i]->init(10);
+
+        m_missMachLatencyHist.push_back(new Stats::Histogram());
+        m_missMachLatencyHist[i]->init(10);
+
+        m_IssueToInitialDelayHist.push_back(new Stats::Histogram());
+        m_IssueToInitialDelayHist[i]->init(10);
+
+        m_InitialToForwardDelayHist.push_back(new Stats::Histogram());
+        m_InitialToForwardDelayHist[i]->init(10);
+
+        m_ForwardToFirstResponseDelayHist.push_back(new Stats::Histogram());
+        m_ForwardToFirstResponseDelayHist[i]->init(10);
+
+        m_FirstResponseToCompletionDelayHist.push_back(new Stats::Histogram());
+        m_FirstResponseToCompletionDelayHist[i]->init(10);
+    }
+
+    for (int i = 0; i < RubyRequestType_NUM; i++) {
+        m_hitTypeMachLatencyHist.push_back(std::vector<Stats::Histogram *>());
+        m_missTypeMachLatencyHist.push_back(std::vector<Stats::Histogram *>());
+
+        for (int j = 0; j < MachineType_NUM; j++) {
+            m_hitTypeMachLatencyHist[i].push_back(new Stats::Histogram());
+            m_hitTypeMachLatencyHist[i][j]->init(10);
+
+            m_missTypeMachLatencyHist[i].push_back(new Stats::Histogram());
+            m_missTypeMachLatencyHist[i][j]->init(10);
+        }
+    }
+}
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh
index 86e6aa2a9..d7dc7d151 100644
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -66,7 +66,9 @@ class Sequencer : public RubyPort
     // Public Methods
     void wakeup(); // Used only for deadlock detection
     void printProgress(std::ostream& out) const;
-    void clearStats();
+    void resetStats();
+    void collateStats();
+    void regStats();
 
     void writeCallback(const Address& address,
                        DataBlock& data,
@@ -95,7 +97,6 @@ class Sequencer : public RubyPort
     { deschedule(deadlockCheckEvent); }
 
     void print(std::ostream& out) const;
-    void printStats(std::ostream& out) const;
     void checkCoherence(const Address& address);
 
     void markRemoved();
@@ -104,45 +105,50 @@ class Sequencer : public RubyPort
     void invalidateSC(const Address& address);
 
     void recordRequestType(SequencerRequestType requestType);
-    Histogram& getOutstandReqHist() { return m_outstandReqHist; }
+    Stats::Histogram& getOutstandReqHist() { return m_outstandReqHist; }
 
-    Histogram& getLatencyHist() { return m_latencyHist; }
-    Histogram& getTypeLatencyHist(uint32_t t)
-    { return m_typeLatencyHist[t]; }
+    Stats::Histogram& getLatencyHist() { return m_latencyHist; }
+    Stats::Histogram& getTypeLatencyHist(uint32_t t)
+    { return *m_typeLatencyHist[t]; }
 
-    Histogram& getHitLatencyHist() { return m_hitLatencyHist; }
-    Histogram& getHitTypeLatencyHist(uint32_t t)
-    { return m_hitTypeLatencyHist[t]; }
+    Stats::Histogram& getHitLatencyHist() { return m_hitLatencyHist; }
+    Stats::Histogram& getHitTypeLatencyHist(uint32_t t)
+    { return *m_hitTypeLatencyHist[t]; }
 
-    Histogram& getHitMachLatencyHist(uint32_t t)
-    { return m_hitMachLatencyHist[t]; }
+    Stats::Histogram& getHitMachLatencyHist(uint32_t t)
+    { return *m_hitMachLatencyHist[t]; }
 
-    Histogram& getHitTypeMachLatencyHist(uint32_t r, uint32_t t)
-    { return m_hitTypeMachLatencyHist[r][t]; }
+    Stats::Histogram& getHitTypeMachLatencyHist(uint32_t r, uint32_t t)
+    { return *m_hitTypeMachLatencyHist[r][t]; }
 
-    Histogram& getMissLatencyHist() { return m_missLatencyHist; }
-    Histogram& getMissTypeLatencyHist(uint32_t t)
-    { return m_missTypeLatencyHist[t]; }
+    Stats::Histogram& getMissLatencyHist()
+    { return m_missLatencyHist; }
+    Stats::Histogram& getMissTypeLatencyHist(uint32_t t)
+    { return *m_missTypeLatencyHist[t]; }
 
-    Histogram& getMissMachLatencyHist(uint32_t t)
-    { return m_missMachLatencyHist[t]; }
+    Stats::Histogram& getMissMachLatencyHist(uint32_t t) const
+    { return *m_missMachLatencyHist[t]; }
 
-    Histogram& getMissTypeMachLatencyHist(uint32_t r, uint32_t t)
-    { return m_missTypeMachLatencyHist[r][t]; }
+    Stats::Histogram&
+    getMissTypeMachLatencyHist(uint32_t r, uint32_t t) const
+    { return *m_missTypeMachLatencyHist[r][t]; }
 
-    Histogram& getIssueToInitialDelayHist(uint32_t t)
-    { return m_IssueToInitialDelayHist[t]; }
+    Stats::Histogram& getIssueToInitialDelayHist(uint32_t t) const
+    { return *m_IssueToInitialDelayHist[t]; }
 
-    Histogram& getInitialToForwardDelayHist(const MachineType t)
-    { return m_InitialToForwardDelayHist[t]; }
+    Stats::Histogram&
+    getInitialToForwardDelayHist(const MachineType t) const
+    { return *m_InitialToForwardDelayHist[t]; }
 
-    Histogram& getForwardRequestToFirstResponseHist(const MachineType t)
-    { return m_ForwardToFirstResponseDelayHist[t]; }
+    Stats::Histogram&
+    getForwardRequestToFirstResponseHist(const MachineType t) const
+    { return *m_ForwardToFirstResponseDelayHist[t]; }
 
-    Histogram& getFirstResponseToCompletionDelayHist(const MachineType t)
-    { return m_FirstResponseToCompletionDelayHist[t]; }
+    Stats::Histogram&
+    getFirstResponseToCompletionDelayHist(const MachineType t) const
+    { return *m_FirstResponseToCompletionDelayHist[t]; }
 
-    const uint64_t getIncompleteTimes(const MachineType t) const
+    Stats::Counter getIncompleteTimes(const MachineType t) const
     { return m_IncompleteTimes[t]; }
 
   private:
@@ -183,46 +189,47 @@ class Sequencer : public RubyPort
     int m_outstanding_count;
     bool m_deadlock_check_scheduled;
 
-    uint32_t m_store_waiting_on_load_cycles;
-    uint32_t m_store_waiting_on_store_cycles;
-    uint32_t m_load_waiting_on_store_cycles;
-    uint32_t m_load_waiting_on_load_cycles;
+    //! Counters for recording aliasing information.
+    Stats::Scalar m_store_waiting_on_load;
+    Stats::Scalar m_store_waiting_on_store;
+    Stats::Scalar m_load_waiting_on_store;
+    Stats::Scalar m_load_waiting_on_load;
 
     bool m_usingNetworkTester;
 
     //! Histogram for number of outstanding requests per cycle.
-    Histogram m_outstandReqHist;
+    Stats::Histogram m_outstandReqHist;
 
     //! Histogram for holding latency profile of all requests.
-    Histogram m_latencyHist;
-    std::vector<Histogram> m_typeLatencyHist;
+    Stats::Histogram m_latencyHist;
+    std::vector<Stats::Histogram *> m_typeLatencyHist;
 
     //! Histogram for holding latency profile of all requests that
     //! hit in the controller connected to this sequencer.
-    Histogram m_hitLatencyHist;
-    std::vector<Histogram> m_hitTypeLatencyHist;
+    Stats::Histogram m_hitLatencyHist;
+    std::vector<Stats::Histogram *> m_hitTypeLatencyHist;
 
     //! Histograms for profiling the latencies for requests that
     //! did not required external messages.
-    std::vector<Histogram> m_hitMachLatencyHist;
-    std::vector< std::vector<Histogram> > m_hitTypeMachLatencyHist;
+    std::vector<Stats::Histogram *> m_hitMachLatencyHist;
+    std::vector< std::vector<Stats::Histogram *> > m_hitTypeMachLatencyHist;
 
     //! Histogram for holding latency profile of all requests that
     //! miss in the controller connected to this sequencer.
-    Histogram m_missLatencyHist;
-    std::vector<Histogram> m_missTypeLatencyHist;
+    Stats::Histogram m_missLatencyHist;
+    std::vector<Stats::Histogram *> m_missTypeLatencyHist;
 
     //! Histograms for profiling the latencies for requests that
     //! required external messages.
-    std::vector<Histogram> m_missMachLatencyHist;
-    std::vector< std::vector<Histogram> > m_missTypeMachLatencyHist;
+    std::vector<Stats::Histogram *> m_missMachLatencyHist;
+    std::vector< std::vector<Stats::Histogram *> > m_missTypeMachLatencyHist;
 
     //! Histograms for recording the breakdown of miss latency
-    std::vector<Histogram> m_IssueToInitialDelayHist;
-    std::vector<Histogram> m_InitialToForwardDelayHist;
-    std::vector<Histogram> m_ForwardToFirstResponseDelayHist;
-    std::vector<Histogram> m_FirstResponseToCompletionDelayHist;
-    std::vector<uint64_t> m_IncompleteTimes;
+    std::vector<Stats::Histogram *> m_IssueToInitialDelayHist;
+    std::vector<Stats::Histogram *> m_InitialToForwardDelayHist;
+    std::vector<Stats::Histogram *> m_ForwardToFirstResponseDelayHist;
+    std::vector<Stats::Histogram *> m_FirstResponseToCompletionDelayHist;
+    std::vector<Stats::Counter> m_IncompleteTimes;
 
 
     class SequencerWakeupEvent : public Event
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index 016169bcc..b2f439178 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -37,7 +37,6 @@
 #include "debug/RubySystem.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/network/Network.hh"
-#include "mem/ruby/profiler/Profiler.hh"
 #include "mem/ruby/system/System.hh"
 #include "sim/eventq.hh"
 #include "sim/simulate.hh"
@@ -73,16 +72,12 @@ RubySystem::RubySystem(const Params *p)
     }
 
     if (p->no_mem_vec) {
-        m_mem_vec_ptr = NULL;
+        m_mem_vec = NULL;
     } else {
-        m_mem_vec_ptr = new MemoryVector;
-        m_mem_vec_ptr->resize(m_memory_size_bytes);
+        m_mem_vec = new MemoryVector;
+        m_mem_vec->resize(m_memory_size_bytes);
     }
 
-    // Print ruby configuration and stats at exit and when asked for
-    Stats::registerDumpCallback(new RubyDumpStatsCallback(p->stats_filename,
-                                                          this));
-
     m_warmup_enabled = false;
     m_cooldown_enabled = false;
 
@@ -91,18 +86,17 @@ RubySystem::RubySystem(const Params *p)
 
     // Resize to the size of different machine types
     g_abs_controls.resize(MachineType_NUM);
-}
 
-void
-RubySystem::registerNetwork(Network* network_ptr)
-{
-  m_network_ptr = network_ptr;
+    // Collate the statistics before they are printed.
+    Stats::registerDumpCallback(new RubyStatsCallback(this));
+    // Create the profiler
+    m_profiler = new Profiler(p);
 }
 
 void
-RubySystem::registerProfiler(Profiler* profiler_ptr)
+RubySystem::registerNetwork(Network* network_ptr)
 {
-  m_profiler_ptr = profiler_ptr;
+  m_network = network_ptr;
 }
 
 void
@@ -127,16 +121,10 @@ RubySystem::registerMemController(MemoryControl *mc) {
 
 RubySystem::~RubySystem()
 {
-    delete m_network_ptr;
-    delete m_profiler_ptr;
-    if (m_mem_vec_ptr)
-        delete m_mem_vec_ptr;
-}
-
-void
-RubySystem::printStats(ostream& out)
-{
-    m_profiler_ptr->printStats(out);
+    delete m_network;
+    delete m_profiler;
+    if (m_mem_vec)
+        delete m_mem_vec;
 }
 
 void
@@ -223,8 +211,8 @@ RubySystem::serialize(std::ostream &os)
 
     uint8_t *raw_data = NULL;
 
-    if (m_mem_vec_ptr != NULL) {
-        uint64 memory_trace_size = m_mem_vec_ptr->collatePages(raw_data);
+    if (m_mem_vec != NULL) {
+        uint64 memory_trace_size = m_mem_vec->collatePages(raw_data);
 
         string memory_trace_file = name() + ".memory.gz";
         writeCompressedTrace(raw_data, memory_trace_file,
@@ -289,7 +277,7 @@ RubySystem::unserialize(Checkpoint *cp, const string &section)
 {
     uint8_t *uncompressed_trace = NULL;
 
-    if (m_mem_vec_ptr != NULL) {
+    if (m_mem_vec != NULL) {
         string memory_trace_file;
         uint64 memory_trace_size = 0;
 
@@ -299,7 +287,7 @@ RubySystem::unserialize(Checkpoint *cp, const string &section)
 
         readCompressedTrace(memory_trace_file, uncompressed_trace,
                             memory_trace_size);
-        m_mem_vec_ptr->populatePages(uncompressed_trace);
+        m_mem_vec->populatePages(uncompressed_trace);
 
         delete [] uncompressed_trace;
         uncompressed_trace = NULL;
@@ -401,11 +389,6 @@ RubySystem::RubyEvent::process()
 void
 RubySystem::resetStats()
 {
-    m_profiler_ptr->clearStats();
-    for (uint32_t cntrl = 0; cntrl < m_abs_cntrl_vec.size(); cntrl++) {
-        m_abs_cntrl_vec[cntrl]->clearStats();
-    }
-
     g_ruby_start = curCycle();
 }
 
@@ -552,7 +535,7 @@ RubySystem::functionalWrite(PacketPtr pkt)
             m_memory_controller_vec[i]->functionalWriteBuffers(pkt);
     }
 
-    num_functional_writes += m_network_ptr->functionalWrite(pkt);
+    num_functional_writes += m_network->functionalWrite(pkt);
     DPRINTF(RubySystem, "Messages written = %u\n", num_functional_writes);
 
     return true;
@@ -615,13 +598,3 @@ RubySystemParams::create()
 {
     return new RubySystem(this);
 }
-
-/**
- * virtual process function that is invoked when the callback
- * queue is executed.
- */
-void
-RubyDumpStatsCallback::process()
-{
-    ruby_system->printStats(*os);
-}
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 474741bf7..de35116d4 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -39,16 +39,16 @@
 #include "base/output.hh"
 #include "mem/packet.hh"
 #include "mem/ruby/common/Global.hh"
+#include "mem/ruby/profiler/Profiler.hh"
 #include "mem/ruby/recorder/CacheRecorder.hh"
 #include "mem/ruby/slicc_interface/AbstractController.hh"
+#include "mem/ruby/system/MemoryControl.hh"
 #include "mem/ruby/system/MemoryVector.hh"
 #include "mem/ruby/system/SparseMemory.hh"
 #include "params/RubySystem.hh"
 #include "sim/clocked_object.hh"
 
 class Network;
-class Profiler;
-class MemoryControl;
 
 class RubySystem : public ClockedObject
 {
@@ -84,27 +84,27 @@ class RubySystem : public ClockedObject
     Network*
     getNetwork()
     {
-        assert(m_network_ptr != NULL);
-        return m_network_ptr;
+        assert(m_network != NULL);
+        return m_network;
     }
 
     Profiler*
     getProfiler()
     {
-        assert(m_profiler_ptr != NULL);
-        return m_profiler_ptr;
+        assert(m_profiler != NULL);
+        return m_profiler;
     }
 
     MemoryVector*
     getMemoryVector()
     {
-        assert(m_mem_vec_ptr != NULL);
-        return m_mem_vec_ptr;
+        assert(m_mem_vec != NULL);
+        return m_mem_vec;
     }
 
-    void printStats(std::ostream& out);
+    void regStats() { m_profiler->regStats(name()); }
+    void collateStats() { m_profiler->collateStats(); }
     void resetStats();
-    void print(std::ostream& out) const;
 
     void serialize(std::ostream &os);
     void unserialize(Checkpoint *cp, const std::string &section);
@@ -114,7 +114,6 @@ class RubySystem : public ClockedObject
     bool functionalWrite(Packet *ptr);
 
     void registerNetwork(Network*);
-    void registerProfiler(Profiler*);
     void registerAbstractController(AbstractController*);
     void registerSparseMemory(SparseMemory*);
     void registerMemController(MemoryControl *mc);
@@ -146,44 +145,28 @@ class RubySystem : public ClockedObject
     static uint64_t m_memory_size_bytes;
     static uint32_t m_memory_size_bits;
 
-    Network* m_network_ptr;
+    Network* m_network;
     std::vector<MemoryControl *> m_memory_controller_vec;
     std::vector<AbstractController *> m_abs_cntrl_vec;
 
   public:
-    Profiler* m_profiler_ptr;
-    MemoryVector* m_mem_vec_ptr;
+    Profiler* m_profiler;
+    MemoryVector* m_mem_vec;
     bool m_warmup_enabled;
     bool m_cooldown_enabled;
     CacheRecorder* m_cache_recorder;
     std::vector<SparseMemory*> m_sparse_memory_vector;
 };
 
-inline std::ostream&
-operator<<(std::ostream& out, const RubySystem& obj)
-{
-    //obj.print(out);
-    out << std::flush;
-    return out;
-}
-
-class RubyDumpStatsCallback : public Callback
+class RubyStatsCallback : public Callback
 {
   private:
-    std::ostream *os;
     RubySystem *ruby_system;
 
   public:
-    virtual ~RubyDumpStatsCallback() {}
-
-    RubyDumpStatsCallback(const std::string& _stats_filename,
-                          RubySystem *system)
-    {
-        os = simout.create(_stats_filename);
-        ruby_system = system;
-    }
-
-    void process();
+    virtual ~RubyStatsCallback() {}
+    RubyStatsCallback(RubySystem *system) : ruby_system(system) {}
+    void process() { ruby_system->collateStats(); }
 };
 
 #endif // __MEM_RUBY_SYSTEM_SYSTEM_HH__
diff --git a/src/mem/ruby/system/WireBuffer.cc b/src/mem/ruby/system/WireBuffer.cc
index 8c7c9211e..f45bd5678 100644
--- a/src/mem/ruby/system/WireBuffer.cc
+++ b/src/mem/ruby/system/WireBuffer.cc
@@ -146,16 +146,6 @@ WireBuffer::print(ostream& out) const
 }
 
 void
-WireBuffer::clearStats() const
-{
-}
-
-void
-WireBuffer::printStats(ostream& out) const
-{
-}
-
-void
 WireBuffer::wakeup()
 {
 }
diff --git a/src/mem/ruby/system/WireBuffer.hh b/src/mem/ruby/system/WireBuffer.hh
index 3a8804798..9fb2d87a8 100644
--- a/src/mem/ruby/system/WireBuffer.hh
+++ b/src/mem/ruby/system/WireBuffer.hh
@@ -81,9 +81,6 @@ class WireBuffer : public SimObject
     bool areNSlotsAvailable(int n) { return true; };  // infinite queue length
 
     void print(std::ostream& out) const;
-    void clearStats() const;
-    void printStats(std::ostream& out) const;
-
     uint64_t m_msg_counter;
 
   private: