ruby: Reincarnated the responding machine profiling

This patch adds back to ruby the capability to understand the response time
for messages that hit in different levels of the cache heirarchy.
Specifically add support for the MI_example, MOESI_hammer, and MOESI_CMP_token
protocols.

2 files changed, 35 insertions, 5 deletions

diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 19bcb4b1c..e4f85908f 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -305,6 +305,14 @@ Sequencer::removeRequest(SequencerRequest* srequest)
 void
 Sequencer::writeCallback(const Address& address, DataBlock& data)
 {
+    writeCallback(address, GenericMachineType_NULL, data);
+}
+
+void
+Sequencer::writeCallback(const Address& address,
+                         GenericMachineType mach, 
+                         DataBlock& data)
+{
     assert(address == line_address(address));
     assert(m_writeRequestTable.count(line_address(address)));
 
@@ -329,12 +337,20 @@ Sequencer::writeCallback(const Address& address, DataBlock& data)
         m_controller->unblock(address);
     }
 
-    hitCallback(request, data);
+    hitCallback(request, mach, data);
 }
 
 void
 Sequencer::readCallback(const Address& address, DataBlock& data)
 {
+    readCallback(address, GenericMachineType_NULL, data);
+}
+
+void
+Sequencer::readCallback(const Address& address,
+                        GenericMachineType mach,
+                        DataBlock& data)
+{
     assert(address == line_address(address));
     assert(m_readRequestTable.count(line_address(address)));
 
@@ -349,11 +365,13 @@ Sequencer::readCallback(const Address& address, DataBlock& data)
            (request->ruby_request.type == RubyRequestType_RMW_Read) ||
            (request->ruby_request.type == RubyRequestType_IFETCH));
 
-    hitCallback(request, data);
+    hitCallback(request, mach, data);
 }
 
 void
-Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data)
+Sequencer::hitCallback(SequencerRequest* srequest,
+                       GenericMachineType mach,
+                       DataBlock& data)
 {
     const RubyRequest & ruby_request = srequest->ruby_request;
     Address request_address(ruby_request.paddr);
@@ -376,7 +394,7 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data)
 
     // Profile the miss latency for all non-zero demand misses
     if (miss_latency != 0) {
-        g_system_ptr->getProfiler()->missLatency(miss_latency, type);
+        g_system_ptr->getProfiler()->missLatency(miss_latency, type, mach);
 
         if (Debug::getProtocolTrace()) {
             g_system_ptr->getProfiler()->
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh
index a336751fd..fd6b390c2 100644
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -75,8 +75,17 @@ class Sequencer : public RubyPort, public Consumer
     void printProgress(std::ostream& out) const;
 
     void writeCallback(const Address& address, DataBlock& data);
+
+    void writeCallback(const Address& address, 
+                       GenericMachineType mach, 
+                       DataBlock& data);
+
     void readCallback(const Address& address, DataBlock& data);
 
+    void readCallback(const Address& address, 
+                      GenericMachineType mach, 
+                      DataBlock& data);
+
     RequestStatus makeRequest(const RubyRequest & request);
     RequestStatus getRequestStatus(const RubyRequest& request);
     bool empty() const;
@@ -94,7 +103,10 @@ class Sequencer : public RubyPort, public Consumer
                         int size, DataBlock*& data_ptr);
     void issueRequest(const RubyRequest& request);
 
-    void hitCallback(SequencerRequest* request, DataBlock& data);
+    void hitCallback(SequencerRequest* request, 
+                     GenericMachineType mach,
+                     DataBlock& data);
+
     bool insertRequest(SequencerRequest* request);