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author | Nathan Binkert <nate@binkert.org> | 2009-05-11 10:38:43 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2009-05-11 10:38:43 -0700 |
commit | 2f30950143cc70bc42a3c8a4111d7cf8198ec881 (patch) | |
tree | 708f6c22edb3c6feb31dd82866c26623a5329580 /src/mem/ruby/tester/RaceyDriver.hh | |
parent | c70241810d4e4f523f173c1646b008dc40faad8e (diff) | |
download | gem5-2f30950143cc70bc42a3c8a4111d7cf8198ec881.tar.xz |
ruby: Import ruby and slicc from GEMS
We eventually plan to replace the m5 cache hierarchy with the GEMS
hierarchy, but for now we will make both live alongside eachother.
Diffstat (limited to 'src/mem/ruby/tester/RaceyDriver.hh')
-rw-r--r-- | src/mem/ruby/tester/RaceyDriver.hh | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/src/mem/ruby/tester/RaceyDriver.hh b/src/mem/ruby/tester/RaceyDriver.hh new file mode 100644 index 000000000..a1a821b96 --- /dev/null +++ b/src/mem/ruby/tester/RaceyDriver.hh @@ -0,0 +1,112 @@ + +/* + * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * $Id$ + * + * Description: The driver interface between racey pseudo threads and ruby + * memory timing simulator. + * + */ + +#ifndef RACEYDRIVER_H +#define RACEYDRIVER_H + +#include "Global.hh" +#include "Driver.hh" + +class RaceyPseudoThread; + +class RaceyDriver : public Driver, public Consumer { +public: + // Constructors + RaceyDriver(); + + // Destructor + ~RaceyDriver(); + + // Public Methods + int runningThreads(); + void registerThread0Wakeup(); + void joinThread(); + bool Thread0Initialized() { + return m_racey_pseudo_threads[0]->getInitializedState(); + }; + + void hitCallback(NodeID proc, SubBlock& data, CacheRequestType type, int thread); + void wakeup(); + void printStats(ostream& out) const; + void clearStats() {} + void printConfig(ostream& out) const {} + + integer_t getInstructionCount(int procID) const; + + // save/load cpu states + void saveCPUStates(int cpu_id, string filename) { + m_racey_pseudo_threads[cpu_id]->saveCPUStates(filename); + }; + void loadCPUStates(int cpu_id, string filename) { + m_racey_pseudo_threads[cpu_id]->loadCPUStates(filename); + }; + + // reset IC + void resetIC(int cpu_id) { + m_racey_pseudo_threads[cpu_id]->resetIC(); + } + + void print(ostream& out) const; +private: + + // Private copy constructor and assignment operator + RaceyDriver(const RaceyDriver& obj); + RaceyDriver& operator=(const RaceyDriver& obj); + + // Data Members (m_ prefix) + Vector<RaceyPseudoThread*> m_racey_pseudo_threads; + int m_done_counter; + bool m_wakeup_thread0; + + Time m_finish_time; +}; + +// Output operator declaration +ostream& operator<<(ostream& out, const RaceyDriver& obj); + +// ******************* Definitions ******************* + +// Output operator definition +extern inline +ostream& operator<<(ostream& out, const RaceyDriver& obj) +{ + obj.print(out); + out << flush; + return out; +} + +#endif //RACEYDRIVER_H |