stats: Fixing regStats function for some SimObjects

Fixing an issue with regStats not calling the parent class method
for most SimObjects in Gem5. This causes issues if one adds new
stats in the base class (since they are never initialized properly!).

Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

10 files changed, 22 insertions, 1 deletions

diff --git a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
index 1213073e9..2bd2acb9f 100644
--- a/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
+++ b/src/mem/ruby/network/garnet/BaseGarnetNetwork.cc
@@ -69,6 +69,8 @@ BaseGarnetNetwork::init()
 void
 BaseGarnetNetwork::regStats()
 {
+    Network::regStats();
+
     m_flits_received
         .init(m_virtual_networks)
         .name(name() + ".flits_received")
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
index 97bc1abdd..dab9b7dda 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/Router_d.cc
@@ -158,6 +158,8 @@ Router_d::update_sw_winner(int inport, flit_d *t_flit)
 void
 Router_d::regStats()
 {
+    BasicRouter::regStats();
+
     m_buffer_reads
         .name(name() + ".buffer_reads")
         .flags(Stats::nozero)
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index 25d0b6f4b..2fc7b6440 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -132,6 +132,8 @@ SimpleNetwork::makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
 void
 SimpleNetwork::regStats()
 {
+    Network::regStats();
+
     for (MessageSizeType type = MessageSizeType_FIRST;
          type < MessageSizeType_NUM; ++type) {
         m_msg_counts[(unsigned int) type]
diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc
index 747884f16..78f5b609c 100644
--- a/src/mem/ruby/network/simple/Switch.cc
+++ b/src/mem/ruby/network/simple/Switch.cc
@@ -112,6 +112,8 @@ Switch::getThrottle(LinkID link_number) const
 void
 Switch::regStats()
 {
+    BasicRouter::regStats();
+
     for (int link = 0; link < m_throttles.size(); link++) {
         m_throttles[link]->regStats(name());
     }
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index 5d8b6eeea..b4576f87e 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -76,6 +76,8 @@ AbstractController::resetStats()
 void
 AbstractController::regStats()
 {
+    MemObject::regStats();
+
     m_fully_busy_cycles
         .name(name() + ".fully_busy_cycles")
         .desc("cycles for which number of transistions == max transitions")
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index f7c196119..36d109769 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -488,6 +488,8 @@ CacheMemory::isLocked(Addr address, int context)
 void
 CacheMemory::regStats()
 {
+    SimObject::regStats();
+
     m_demand_hits
         .name(name() + ".demand_hits")
         .desc("Number of cache demand hits")
diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc
index ce6d36c04..eef51dcf7 100644
--- a/src/mem/ruby/structures/Prefetcher.cc
+++ b/src/mem/ruby/structures/Prefetcher.cc
@@ -86,6 +86,8 @@ Prefetcher::~Prefetcher()
 void
 Prefetcher::regStats()
 {
+    SimObject::regStats();
+
     numMissObserved
         .name(name() + ".miss_observed")
         .desc("number of misses observed")
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index 69f79187a..1c57f6c4d 100644
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -1284,6 +1284,8 @@ GPUCoalescer::recordMissLatency(GPUCoalescerRequest* srequest,
 void
 GPUCoalescer::regStats()
 {
+    RubyPort::regStats();
+
     // These statistical variables are not for display.
     // The profiler will collate these across different
     // coalescers and display those collated statistics.
diff --git a/src/mem/ruby/system/RubySystem.hh b/src/mem/ruby/system/RubySystem.hh
index 62330e19d..8ebd3494a 100644
--- a/src/mem/ruby/system/RubySystem.hh
+++ b/src/mem/ruby/system/RubySystem.hh
@@ -89,7 +89,10 @@ class RubySystem : public ClockedObject
         return m_profiler;
     }
 
-    void regStats() override { m_profiler->regStats(name()); }
+    void regStats() override {
+        ClockedObject::regStats();
+        m_profiler->regStats(name());
+    }
     void collateStats() { m_profiler->collateStats(); }
     void resetStats() override;
 
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index f1f6ddadb..cf3edb904 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -721,6 +721,8 @@ Sequencer::evictionCallback(Addr address)
 void
 Sequencer::regStats()
 {
+    RubyPort::regStats();
+
     m_store_waiting_on_load
         .name(name() + ".store_waiting_on_load")
         .desc("Number of times a store aliased with a pending load")