diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-02-20 17:26:41 -0600 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-02-20 17:26:41 -0600 |
commit | b312a41f21b6f76607fe7480a915a4c5093386a3 (patch) | |
tree | 94092e1c3a3123af56a22aa2fd745ab8a66ba00b /src/mem/ruby | |
parent | 0d6009e8dc3ab8419ca7daf9c79c9c987464e3ae (diff) | |
download | gem5-b312a41f21b6f76607fe7480a915a4c5093386a3.tar.xz |
ruby: message buffer: removes some unecessary functions.
Diffstat (limited to 'src/mem/ruby')
-rw-r--r-- | src/mem/ruby/buffers/MessageBuffer.cc | 62 | ||||
-rw-r--r-- | src/mem/ruby/buffers/MessageBuffer.hh | 34 | ||||
-rw-r--r-- | src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/PerfectSwitch.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Throttle.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/Message.hh | 8 | ||||
-rw-r--r-- | src/mem/ruby/system/DMASequencer.cc | 1 |
8 files changed, 33 insertions, 80 deletions
diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc index e04dd3825..2b4c235c6 100644 --- a/src/mem/ruby/buffers/MessageBuffer.cc +++ b/src/mem/ruby/buffers/MessageBuffer.cc @@ -75,7 +75,7 @@ MessageBuffer::getSize() } bool -MessageBuffer::areNSlotsAvailable(int n) +MessageBuffer::areNSlotsAvailable(unsigned int n) { // fast path when message buffers have infinite size @@ -124,7 +124,7 @@ MessageBuffer::getMsgPtrCopy() const } const Message* -MessageBuffer::peekAtHeadOfQueue() const +MessageBuffer::peek() const { DPRINTF(RubyQueue, "Peeking at head of queue.\n"); assert(isReady()); @@ -160,9 +160,7 @@ MessageBuffer::enqueue(MsgPtr message, Cycles delta) } m_msgs_this_cycle++; - if (!m_ordering_set) { - panic("Ordering property of %s has not been set", m_name); - } + assert(m_ordering_set); // Calculate the arrival time of the message, that is, the first // cycle the message can be dequeued. @@ -211,9 +209,7 @@ MessageBuffer::enqueue(MsgPtr message, Cycles delta) assert(m_sender->clockEdge() >= msg_ptr->getLastEnqueueTime() && "ensure we aren't dequeued early"); - msg_ptr->setDelayedTicks(m_sender->clockEdge() - - msg_ptr->getLastEnqueueTime() + - msg_ptr->getDelayedTicks()); + msg_ptr->updateDelayedTicks(m_sender->clockEdge()); msg_ptr->setLastEnqueueTime(arrival_time); // Insert the message into the priority heap @@ -226,29 +222,9 @@ MessageBuffer::enqueue(MsgPtr message, Cycles delta) arrival_time, *(message.get())); // Schedule the wakeup - if (m_consumer != NULL) { - m_consumer->scheduleEventAbsolute(arrival_time); - m_consumer->storeEventInfo(m_vnet_id); - } else { - panic("No consumer: %s name: %s\n", *this, m_name); - } -} - -Cycles -MessageBuffer::dequeue_getDelayCycles(MsgPtr& message) -{ - dequeue(message); - return setAndReturnDelayCycles(message); -} - -void -MessageBuffer::dequeue(MsgPtr& message) -{ - DPRINTF(RubyQueue, "Dequeueing\n"); - message = m_prio_heap.front().m_msgptr; - - pop(); - DPRINTF(RubyQueue, "Enqueue message is %s\n", (*(message.get()))); + assert(m_consumer != NULL); + m_consumer->scheduleEventAbsolute(arrival_time); + m_consumer->storeEventInfo(m_vnet_id); } Cycles @@ -258,14 +234,16 @@ MessageBuffer::dequeue_getDelayCycles() MsgPtr message = m_prio_heap.front().m_msgptr; // get the delay cycles - Cycles delayCycles = setAndReturnDelayCycles(message); + message->updateDelayedTicks(m_receiver->clockEdge()); + Cycles delayCycles = + m_receiver->ticksToCycles(message->getDelayedTicks()); dequeue(); return delayCycles; } void -MessageBuffer::pop() +MessageBuffer::dequeue() { DPRINTF(RubyQueue, "Popping\n"); assert(isReady()); @@ -375,7 +353,7 @@ MessageBuffer::stallMessage(const Address& addr) assert(addr.getOffset() == 0); MsgPtr message = m_prio_heap.front().m_msgptr; - pop(); + dequeue(); // // Note: no event is scheduled to analyze the map at a later time. @@ -385,22 +363,6 @@ MessageBuffer::stallMessage(const Address& addr) (m_stall_msg_map[addr]).push_back(message); } -Cycles -MessageBuffer::setAndReturnDelayCycles(MsgPtr msg_ptr) -{ - // get the delay cycles of the message at the top of the queue - - // this function should only be called on dequeue - // ensure the msg hasn't been enqueued - assert(msg_ptr->getLastEnqueueTime() <= m_receiver->clockEdge()); - - msg_ptr->setDelayedTicks(m_receiver->clockEdge() - - msg_ptr->getLastEnqueueTime() + - msg_ptr->getDelayedTicks()); - - return m_receiver->ticksToCycles(msg_ptr->getDelayedTicks()); -} - void MessageBuffer::print(ostream& out) const { diff --git a/src/mem/ruby/buffers/MessageBuffer.hh b/src/mem/ruby/buffers/MessageBuffer.hh index d3bd90a64..45870e608 100644 --- a/src/mem/ruby/buffers/MessageBuffer.hh +++ b/src/mem/ruby/buffers/MessageBuffer.hh @@ -74,7 +74,7 @@ class MessageBuffer enqueue(node.m_msgptr, Cycles(1)); } - bool areNSlotsAvailable(int n); + bool areNSlotsAvailable(unsigned int n); int getPriority() { return m_priority_rank; } void setPriority(int rank) { m_priority_rank = rank; } void setConsumer(Consumer* consumer) @@ -104,8 +104,9 @@ class MessageBuffer Consumer* getConsumer() { return m_consumer; } - const Message* peekAtHeadOfQueue() const; - const Message* peek() const { return peekAtHeadOfQueue(); } + //! Function for extracting the message at the head of the + //! message queue. The function assumes that the queue is nonempty. + const Message* peek() const; const MsgPtr getMsgPtrCopy() const; const MsgPtr& @@ -115,23 +116,15 @@ class MessageBuffer return m_prio_heap.front().m_msgptr; } - const MsgPtr& - peekMsgPtrEvenIfNotReady() const - { - return m_prio_heap.front().m_msgptr; - } - void enqueue(MsgPtr message) { enqueue(message, Cycles(1)); } void enqueue(MsgPtr message, Cycles delta); - //! returns delay ticks of the message. - Cycles dequeue_getDelayCycles(MsgPtr& message); - void dequeue(MsgPtr& message); - - //! returns delay cycles of the message + //! Updates the delay cycles of the message at the of the queue, + //! removes it from the queue and returns its total delay. Cycles dequeue_getDelayCycles(); - void dequeue() { pop(); } - void pop(); + + void dequeue(); + void recycle(); bool isEmpty() const { return m_prio_heap.size() == 0; } @@ -141,12 +134,12 @@ class MessageBuffer m_strict_fifo = order; m_ordering_set = true; } + void resize(int size) { m_max_size = size; } int getSize(); void setRandomization(bool random_flag) { m_randomization = random_flag; } void clear(); - void print(std::ostream& out) const; void clearStats() { m_not_avail_count = 0; m_msg_counter = 0; } @@ -168,13 +161,6 @@ class MessageBuffer //added by SS Cycles m_recycle_latency; - // Private Methods - Cycles setAndReturnDelayCycles(MsgPtr message); - - // Private copy constructor and assignment operator - MessageBuffer(const MessageBuffer& obj); - MessageBuffer& operator=(const MessageBuffer& obj); - // Data Members (m_ prefix) //! The two ends of the buffer. ClockedObject* m_sender; diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc index adf1c1a4d..f3457ebc7 100644 --- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc +++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc @@ -227,7 +227,7 @@ NetworkInterface_d::wakeup() while (inNode_ptr[vnet]->isReady()) { // Is there a message waiting msg_ptr = inNode_ptr[vnet]->peekMsgPtr(); if (flitisizeMessage(msg_ptr, vnet)) { - inNode_ptr[vnet]->pop(); + inNode_ptr[vnet]->dequeue(); } else { break; } diff --git a/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc b/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc index 09e068557..fb918f95d 100644 --- a/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc +++ b/src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc @@ -253,7 +253,7 @@ NetworkInterface::wakeup() { msg_ptr = inNode_ptr[vnet]->peekMsgPtr(); if (flitisizeMessage(msg_ptr, vnet)) { - inNode_ptr[vnet]->pop(); + inNode_ptr[vnet]->dequeue(); } else { break; } diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc index d2f05e1b0..ecd1eb0be 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.cc +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc @@ -286,7 +286,7 @@ PerfectSwitch::wakeup() } // Dequeue msg - m_in[incoming][vnet]->pop(); + m_in[incoming][vnet]->dequeue(); m_pending_message_count[vnet]--; } } diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc index 88b46e252..df5e624b3 100644 --- a/src/mem/ruby/network/simple/Throttle.cc +++ b/src/mem/ruby/network/simple/Throttle.cc @@ -160,7 +160,7 @@ Throttle::wakeup() // Move the message m_out[vnet]->enqueue(m_in[vnet]->peekMsgPtr(), m_link_latency); - m_in[vnet]->pop(); + m_in[vnet]->dequeue(); // Count the message m_msg_counts[net_msg_ptr->getMessageSize()][vnet]++; diff --git a/src/mem/ruby/slicc_interface/Message.hh b/src/mem/ruby/slicc_interface/Message.hh index e78ad9a76..1c842ae69 100644 --- a/src/mem/ruby/slicc_interface/Message.hh +++ b/src/mem/ruby/slicc_interface/Message.hh @@ -71,7 +71,13 @@ class Message : public RefCounted virtual bool functionalWrite(Packet *pkt) = 0; //{ fatal("Write functional access not implemented!"); } - void setDelayedTicks(const Tick ticks) { m_DelayedTicks = ticks; } + //! Update the delay this message has experienced so far. + void updateDelayedTicks(Tick curTime) + { + assert(m_LastEnqueueTime <= curTime); + Tick delta = curTime - m_LastEnqueueTime; + m_DelayedTicks += delta; + } const Tick getDelayedTicks() const {return m_DelayedTicks;} void setLastEnqueueTime(const Tick& time) { m_LastEnqueueTime = time; } diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index 37df1c653..469d19be6 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -30,7 +30,6 @@ #include "debug/RubyStats.hh" #include "mem/protocol/SequencerMsg.hh" #include "mem/protocol/SequencerRequestType.hh" -#include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/system/DMASequencer.hh" #include "mem/ruby/system/System.hh" |