ruby: removed all refs to old RubyConfig

42 files changed, 24 insertions, 1182 deletions

diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc
index 7e2715ff9..3928e94e6 100644
--- a/src/mem/ruby/buffers/MessageBuffer.cc
+++ b/src/mem/ruby/buffers/MessageBuffer.cc
@@ -32,7 +32,6 @@
  */
 
 #include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/system/System.hh"
 
 MessageBuffer::MessageBuffer()
@@ -323,7 +322,6 @@ void MessageBuffer::clear()
 
 void MessageBuffer::recycle()
 {
-  //  const int RubyConfig::getRecycleLatency() = 3;
   DEBUG_MSG(QUEUE_COMP,MedPrio,"recycling " + m_name);
   assert(isReady());
   MessageBufferNode node = m_prio_heap.extractMin();
diff --git a/src/mem/ruby/common/Address.hh b/src/mem/ruby/common/Address.hh
index b6899d1ac..c48152354 100644
--- a/src/mem/ruby/common/Address.hh
+++ b/src/mem/ruby/common/Address.hh
@@ -107,16 +107,6 @@ private:
 inline
 Address line_address(const Address& addr) { Address temp(addr); temp.makeLineAddress(); return temp; }
 
-/*
-inline
-Address next_stride_address(const Address& addr, int stride) {
-  Address temp = addr;
-  temp.makeNextStrideAddress(stride);
-  temp.setAddress(temp.maskHighOrderBits(ADDRESS_WIDTH-RubyConfig::memorySizeBits()));  // surpress wrap-around problem
-  return temp;
-}
-*/
-
 // Output operator declaration
 ostream& operator<<(ostream& out, const Address& obj);
 // comparison operator declaration
@@ -207,17 +197,6 @@ integer_t Address::memoryModuleIndex() const
 {
   integer_t index = bitSelect(RubySystem::getBlockSizeBits()+RubySystem::getMemorySizeBits(), ADDRESS_WIDTH);
   assert (index >= 0);
-  /*
-  if (index >= RubyConfig::memoryModuleBlocks()) {
-    cerr << " memoryBits: " << RubySystem::getMemorySizeBits() << " memorySizeBits: " << RubySystem::getMemorySizeBits()
-         << " Address: " << "[" << hex << "0x" << m_address << "," << " line 0x" << maskLowOrderBits(RubySystem::getBlockSizeBits()) << dec << "]" << flush
-         << "error: limit exceeded. " <<
-      " getDataBlockBits: " << RubySystem::getBlockSizeBits() <<
-      " memoryModuleBlocks: " << RubyConfig::memoryModuleBlocks() <<
-      " index: " << index << endl;
-  }
-  assert (index < RubyConfig::memoryModuleBlocks());
-  */
   return index;
 
   //  Index indexHighPortion = address.bitSelect(MEMORY_SIZE_BITS-1, PAGE_SIZE_BITS+NUMBER_OF_MEMORY_MODULE_BITS);
diff --git a/src/mem/ruby/common/NetDest.cc b/src/mem/ruby/common/NetDest.cc
index 390d5ee8e..32771235f 100644
--- a/src/mem/ruby/common/NetDest.cc
+++ b/src/mem/ruby/common/NetDest.cc
@@ -37,7 +37,6 @@
  */
 
 #include "mem/ruby/common/NetDest.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/protocol/Protocol.hh"
 
 NetDest::NetDest()
diff --git a/src/mem/ruby/common/NetDest.hh b/src/mem/ruby/common/NetDest.hh
index 20aac5108..1dcee7b7a 100644
--- a/src/mem/ruby/common/NetDest.hh
+++ b/src/mem/ruby/common/NetDest.hh
@@ -48,7 +48,6 @@
 #include "mem/gems_common/Vector.hh"
 #include "mem/ruby/system/NodeID.hh"
 #include "mem/ruby/system/MachineID.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Set.hh"
 #include "mem/protocol/MachineType.hh"
 
diff --git a/src/mem/ruby/common/Set.cc b/src/mem/ruby/common/Set.cc
index 2c64ad3bc..f7dd24356 100644
--- a/src/mem/ruby/common/Set.cc
+++ b/src/mem/ruby/common/Set.cc
@@ -41,7 +41,6 @@
 
 #include "mem/ruby/common/Set.hh"
 #include "mem/ruby/system/System.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 
 #if __amd64__ || __LP64__
 #define __64BITS__
@@ -512,7 +511,7 @@ void Set::setSize(int size)
 #endif // __32BITS__
 
   // decide whether to use dynamic or static alloction
-  if(m_nArrayLen<=NUMBER_WORDS_PER_SET) { // constant defined in RubyConfig.hh
+  if(m_nArrayLen<=NUMBER_WORDS_PER_SET) { // constant defined in RubySystem.hh
     // its OK to use the static allocation, and it will
     // probably be faster (as m_nArrayLen is already in the
     // cache and they will probably share the same cache line)
diff --git a/src/mem/ruby/common/Set.hh b/src/mem/ruby/common/Set.hh
index 43fa5b45e..a22da914c 100644
--- a/src/mem/ruby/common/Set.hh
+++ b/src/mem/ruby/common/Set.hh
@@ -45,10 +45,10 @@
 #ifndef SET_H
 #define SET_H
 
+#include "mem/ruby/system/System.hh"
 #include "mem/ruby/common/Global.hh"
 #include "mem/gems_common/Vector.hh"
 #include "mem/ruby/system/NodeID.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 
 // gibson 05/20/05
 // enum PresenceBit {NotPresent, Present};
diff --git a/src/mem/ruby/common/SubBlock.hh b/src/mem/ruby/common/SubBlock.hh
index 3bc09e1d0..753666a17 100644
--- a/src/mem/ruby/common/SubBlock.hh
+++ b/src/mem/ruby/common/SubBlock.hh
@@ -37,7 +37,6 @@
 
 #include "mem/ruby/common/Global.hh"
 #include "mem/ruby/common/Address.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/DataBlock.hh"
 #include "mem/gems_common/Vector.hh"
 
diff --git a/src/mem/ruby/config/RubyConfig.cc b/src/mem/ruby/config/RubyConfig.cc
deleted file mode 100644
index 4ecec4da6..000000000
--- a/src/mem/ruby/config/RubyConfig.cc
+++ /dev/null
@@ -1,250 +0,0 @@
-
-/*
- * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * RubyConfig.cc
- *
- * Description: See RubyConfig.hh
- *
- * $Id$
- *
- */
-
-#include "mem/ruby/config/RubyConfig.hh"
-//#include "mem/protocol/protocol_name.hh"
-#include "mem/gems_common/util.hh"
-
-#define CONFIG_DEF_FILE "mem/ruby/config/config.hh"
-
-#define ERROR_MSG(MESSAGE)\
-{\
-    cerr << "Fatal Error: in fn "\
-         << __PRETTY_FUNCTION__ << " in "\
-         << __FILE__ << ":"\
-         << __LINE__ << ": "\
-         << (MESSAGE) << endl << flush;\
-    abort();\
-}
-
-// declare all configuration variables
-#define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  bool RubyConfig::m_##NAME = DEFAULT_VALUE;
-#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  const char* RubyConfig::m_##NAME = DEFAULT_VALUE;
-#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  uint64 RubyConfig::m_##NAME = DEFAULT_VALUE;
-#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  int RubyConfig::m_##NAME = DEFAULT_VALUE;
-#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  TYPE* RubyConfig::m_##NAME = NULL;
-#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  TYPE** RubyConfig::m_##NAME = NULL;
-#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  TYPE*** RubyConfig::m_##NAME = NULL;
-#include CONFIG_DEF_FILE
-#undef PARAM_BOOL
-#undef PARAM_STRING
-#undef PARAM_ULONG
-#undef PARAM
-#undef PARAM_ARRAY
-#undef PARAM_ARRAY2D
-#undef PARAM_ARRAY3D
-
-#define CHECK_POWER_OF_2(N) { if (!is_power_of_2(N)) { ERROR_MSG(#N " must be a power of 2."); }}
-#define CHECK_ZERO(N) { if (N != 0) { ERROR_MSG(#N " must be zero at initialization."); }}
-#define CHECK_NON_ZERO(N) { if (N == 0) { ERROR_MSG(#N " must be non-zero."); }}
-
-uint32 RubyConfig::m_data_block_mask;
-
-void RubyConfig::reset()
-{
- #define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = DEFAULT_VALUE;
-#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = DEFAULT_VALUE;
-#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = DEFAULT_VALUE;
-#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = DEFAULT_VALUE;
-#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = new TYPE[DEFAULT_ARRAY_SIZE]; \
-  for (int i=0; i<DEFAULT_ARRAY_SIZE; i++) \
-    m_##NAME[i] = DEFAULT_VALUE;
-#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = new TYPE*[D1_DEFAULT_ARRAY_SIZE]; \
-  for (int i=0; i<D1_DEFAULT_ARRAY_SIZE; i++) {       \
-    m_##NAME[i] = new TYPE[D2_DEFAULT_ARRAY_SIZE]; \
-    for (int j=0; j<D2_DEFAULT_ARRAY_SIZE; j++) \
-      m_##NAME[i][j] = DEFAULT_VALUE; \
-  }
-#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  m_##NAME = new TYPE**[D1_DEFAULT_ARRAY_SIZE];                         \
-  for (int i=0; i<D1_DEFAULT_ARRAY_SIZE; i++) {                         \
-    m_##NAME[i] = new TYPE*[D2_DEFAULT_ARRAY_SIZE];                     \
-    for (int j=0; j<D2_DEFAULT_ARRAY_SIZE; j++) {                       \
-      m_##NAME[i][j] = new TYPE[D3_DEFAULT_ARRAY_SIZE];                 \
-      for (int k=0; k<D3_DEFAULT_ARRAY_SIZE; k++)                       \
-        m_##NAME[i][j][k] = DEFUALT_VALUE;                              \
-    }                                                                   \
-  }
-#include CONFIG_DEF_FILE
-#undef PARAM_BOOL
-#undef PARAM_STRING
-#undef PARAM_ULONG
-#undef PARAM
-#undef PARAM_ARRAY
-#undef PARAM_ARRAY2D
-#undef PARAM_ARRAY3D
-}
-
-void RubyConfig::init()
-{
-  /*
-  // MemoryControl:
-  CHECK_NON_ZERO(m_MEM_BUS_CYCLE_MULTIPLIER);
-  CHECK_NON_ZERO(m_BANKS_PER_RANK);
-  CHECK_NON_ZERO(m_RANKS_PER_DIMM);
-  CHECK_NON_ZERO(m_DIMMS_PER_CHANNEL);
-  CHECK_NON_ZERO(m_BANK_QUEUE_SIZE);
-  CHECK_NON_ZERO(m_BankBusyTime);
-  CHECK_NON_ZERO(m_MEM_CTL_LATENCY);
-  CHECK_NON_ZERO(m_REFRESH_PERIOD);
-  CHECK_NON_ZERO(m_BASIC_BUS_BUSY_TIME);
-
-  CHECK_POWER_OF_2(m_BANKS_PER_RANK);
-  CHECK_POWER_OF_2(m_RANKS_PER_DIMM);
-  CHECK_POWER_OF_2(m_DIMMS_PER_CHANNEL);
-
-  CHECK_NON_ZERO(m_MemorySizeBytes);
-  //  CHECK_NON_ZERO(m_DATA_BLOCK_BYTES);
-  CHECK_NON_ZERO(m_NUM_PROCESSORS);
-  CHECK_NON_ZERO(m_ProcsPerChip);
-
-  if (m_NUM_L2_BANKS == 0) {  // defaults to number of ruby nodes
-    m_NUM_L2_BANKS = m_NUM_PROCESSORS;
-  }
-  if (m_NUM_MEMORIES == 0) {  // defaults to number of ruby nodes
-    m_NUM_MEMORIES = m_NUM_PROCESSORS;
-  }
-
-  CHECK_ZERO(m_MEMORY_SIZE_BITS);
-  CHECK_ZERO(m_NUM_PROCESSORS_BITS);
-  CHECK_ZERO(m_NUM_CHIP_BITS);
-  CHECK_ZERO(m_NUM_L2_BANKS_BITS);
-  CHECK_ZERO(m_NUM_MEMORIES_BITS);
-  CHECK_ZERO(m_PROCS_PER_CHIP_BITS);
-  CHECK_ZERO(m_NUM_L2_BANKS_PER_CHIP);
-  CHECK_ZERO(m_NUM_L2_BANKS_PER_CHIP_BITS);
-  CHECK_ZERO(m_NUM_MEMORIES_BITS);
-  CHECK_ZERO(m_MEMORY_MODULE_BLOCKS);
-  CHECK_ZERO(m_MEMORY_MODULE_BITS);
-  CHECK_ZERO(m_NUM_MEMORIES_PER_CHIP);
-
-  CHECK_POWER_OF_2(m_MemorySizeBytes);
-  CHECK_POWER_OF_2(m_NUM_PROCESSORS);
-  CHECK_POWER_OF_2(m_NUM_L2_BANKS);
-  CHECK_POWER_OF_2(m_NUM_MEMORIES);
-  CHECK_POWER_OF_2(m_ProcsPerChip);
-
-  assert(m_NUM_PROCESSORS >= m_ProcsPerChip);  // obviously can't have less processors than procs/chip
-  m_NUM_CHIPS = m_NUM_PROCESSORS/m_ProcsPerChip;
-  assert(m_NUM_L2_BANKS >= m_NUM_CHIPS);  // cannot have a single L2cache across multiple chips
-
-  m_NUM_L2_BANKS_PER_CHIP = m_NUM_L2_BANKS/m_NUM_CHIPS;
-
-  if (m_NUM_CHIPS > m_NUM_MEMORIES) {
-    m_NUM_MEMORIES_PER_CHIP = 1;  // some chips have a memory, others don't
-  } else {
-    m_NUM_MEMORIES_PER_CHIP = m_NUM_MEMORIES/m_NUM_CHIPS;
-  }
-
-  m_NUM_CHIP_BITS = log_int(m_NUM_CHIPS);
-  m_MEMORY_SIZE_BITS = log_int(m_MemorySizeBytes);
-
-  m_data_block_mask = ~ (~0 << m_DATA_BLOCK_BITS);
-
-  m_NUM_PROCESSORS_BITS = log_int(m_NUM_PROCESSORS);
-  m_NUM_L2_BANKS_BITS = log_int(m_NUM_L2_BANKS);
-  m_NUM_L2_BANKS_PER_CHIP_BITS = log_int(m_NUM_L2_BANKS_PER_CHIP);
-  m_NUM_MEMORIES_BITS = log_int(m_NUM_MEMORIES);
-  m_PROCS_PER_CHIP_BITS = log_int(m_ProcsPerChip);
-
-  m_MEMORY_MODULE_BITS = m_MEMORY_SIZE_BITS - m_DATA_BLOCK_BITS - m_NUM_MEMORIES_BITS;
-  m_MEMORY_MODULE_BLOCKS = (int64(1) << m_MEMORY_MODULE_BITS);
-
-  */
-
-  // Randomize the execution
-  //  srandom(m_RandomSeed);
-}
-
-static void print_parameters(ostream& out)
-{
-
-#define print_true(NAME)
-#define print_false(NAME)                                         \
-  out << #NAME << ": " << RubyConfig::get##NAME () << endl
-
-#define PARAM(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_UINT(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_ULONG(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_BOOL(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_DOUBLE(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_STRING(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
-#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY" << endl; }
-#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY2D" << endl; }
-#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY3D" << endl; }
-#include "mem/ruby/config/config.hh"
-#undef PARAM
-#undef PARAM_UINT
-#undef PARAM_ULONG
-#undef PARAM_BOOL
-#undef PARAM_DOUBLE
-#undef PARAM_STRING
-#undef PARAM_ARRAY
-#undef PARAM_ARRAY2D
-#undef PARAM_ARRAY3D
-}
-
-void RubyConfig::printConfiguration(ostream& out) {
-  out << "Ruby Configuration" << endl;
-  out << "------------------" << endl;
-
-  //out << "protocol: " << CURRENT_PROTOCOL << endl;
-  out << "compiled_at: " << __TIME__ << ", " << __DATE__ << endl;
-  //  out << "RUBY_DEBUG: " << bool_to_string(RUBY_DEBUG) << endl;
-
-  char buffer[100];
-  gethostname(buffer, 50);
-  out << "hostname: " << buffer << endl;
-
-  print_parameters(out);
-}
-
-
diff --git a/src/mem/ruby/config/RubyConfig.hh b/src/mem/ruby/config/RubyConfig.hh
deleted file mode 100644
index 8ad733385..000000000
--- a/src/mem/ruby/config/RubyConfig.hh
+++ /dev/null
@@ -1,229 +0,0 @@
-
-/*
- * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * RubyConfig.hh
- *
- * Description: This class has only static members and class methods,
- * and thus should never need to be instantiated.
- *
- * $Id$
- *
- */
-
-#ifndef RUBYCONFIG_H
-#define RUBYCONFIG_H
-
-#include <cstdlib>
-#include <string>
-#include <ostream>
-#include <assert.h>
-
-#include "mem/ruby/common/TypeDefines.hh"
-
-// Set paramterization
-/*
- * This defines the number of longs (32-bits on 32 bit machines,
- * 64-bit on 64-bit AMD machines) to use to hold the set...
- * the default is 4, allowing 128 or 256 different members
- * of the set.
- *
- * This should never need to be changed for correctness reasons,
- * though increasing it will increase performance for larger
- * set sizes at the cost of a (much) larger memory footprint
- *
- */
-const int NUMBER_WORDS_PER_SET = 4;
-
-using namespace std;
-
-class RubyConfig {
-public:
-
-  // CACHE BLOCK CONFIG VARIBLES
-  static uint32 dataBlockMask() { return m_data_block_mask; }
-
-  static int numberOfDMA() { return 1; }
-  static int numberOfDMAPerChip() { return 1; }
-  static int DMATransitionsPerCycle() { return 1; }
-
-  // SUPPORTED PHYSICAL MEMORY CONFIG VARIABLES
-  //  static int memoryModuleBits() { return m_MEMORY_MODULE_BITS; }
-  //  static int64 memoryModuleBlocks() { return m_MEMORY_MODULE_BLOCKS; }
-
-  // defines the number of simics processors (power of 2)
-  //  static int numberOfProcessors() { return m_NUM_PROCESSORS; }
-  //  static int procsPerChipBits() { return m_PROCS_PER_CHIP_BITS; }
-  //  static int numberOfProcsPerChip() { return m_ProcsPerChip; }
-  //  static int numberOfChips() { return m_NUM_CHIPS; }
-
-  // MACHINE INSTANIATION CONFIG VARIABLES
-  // -------------------------------------
-  // L1 CACHE MACHINES
-  // defines the number of L1banks - idependent of ruby chips (power of 2)
-  // NOTE - no protocols currently supports L1s != processors, just a placeholder
-
-  // DIRECTORY/MEMORY MACHINES
-  // defines the number of ruby memories - idependent of ruby chips (power of 2)
-  //  static int memoryBits() { return m_NUM_MEMORIES_BITS; }
-  //  static int numberOfDirectory() { return numberOfMemories(); }
-  //  static int numberOfMemories() { return m_NUM_MEMORIES; }
-  //  static int numberOfDirectoryPerChip() { return m_NUM_MEMORIES_PER_CHIP; }
-  //  static int DirectoryTransitionsPerCycle() { return m_DIRECTORY_TRANSITIONS_PER_RUBY_CYCLE; }
-
-  // ---- END MACHINE SPECIFIC VARIABLES ----
-
-  // VARIABLE MEMORY RESPONSE LATENCY
-  // *** NOTE *** This is where variation is added to the simulation
-  // see Alameldeen et al. HPCA 2003 for further details
-//  static int getMemoryLatency() { return m_MEMORY_RESPONSE_LATENCY_MINUS_2+(random() % 5); }
-
-  static void reset();
-  static void init();
-  static void printConfiguration(std::ostream& out);
-
-  // Memory Controller
-
-//  static int memBusCycleMultiplier () { return m_MEM_BUS_CYCLE_MULTIPLIER; }
-/*  static int banksPerRank () { return m_BANKS_PER_RANK; }
-  static int ranksPerDimm () { return m_RANKS_PER_DIMM; }
-  static int dimmsPerChannel () { return m_DIMMS_PER_CHANNEL; }
-  static int bankBit0 () { return m_BANK_BIT_0; }
-  static int rankBit0 () { return m_RANK_BIT_0; }
-  static int dimmBit0 () { return m_DIMM_BIT_0; }
-  static int bankQueueSize () { return m_BANK_QUEUE_SIZE; }
-  static int bankBusyTime () { return m_BankBusyTime; }
-  static int rankRankDelay () { return m_RANK_RANK_DELAY; }
-  static int readWriteDelay () { return m_READ_WRITE_DELAY; }
-  static int basicBusBusyTime () { return m_BASIC_BUS_BUSY_TIME; }
-  static int memCtlLatency () { return m_MEM_CTL_LATENCY; }
-  static int refreshPeriod () { return m_REFRESH_PERIOD; }
-  static int tFaw () { return m_TFAW; }
-  static int memRandomArbitrate () { return m_MEM_RANDOM_ARBITRATE; }
-  static int memFixedDelay () { return m_MEM_FIXED_DELAY; }
-*/
-  /* cache accessors */
-  static int getCacheIDFromParams(int level, int num, string split_type) {
-    // TODO:  this function
-    return 0;
-  }
-
-#define accessor_true( TYPE, NAME )
-#define accessor_false( TYPE, NAME )                    \
-  static TYPE get##NAME() { return m_##NAME; }          \
-  static void set##NAME(TYPE val) { m_##NAME = val; }
-
-#define array_accessor_true( TYPE, NAME, DEFAULT_ARRAY_SIZE )
-#define array_accessor_false( TYPE, NAME, DEFAULT_ARRAY_SIZE )          \
-  static TYPE get##NAME(int idx) {                                      \
-    assert(m_##NAME != NULL);                                           \
-    return m_##NAME[idx];                                               \
-  }                                                                     \
-  static void set##NAME(int idx, TYPE val) {                            \
-    if(m_##NAME == NULL) {                                              \
-      assert(DEFAULT_ARRAY_SIZE > 0);                                   \
-      m_##NAME = new TYPE[DEFAULT_ARRAY_SIZE];                          \
-    }                                                                   \
-    m_##NAME[idx] = val;                                                \
-  }
-
-#define array2d_accessor_true( TYPE, NAME )
-#define array2d_accessor_false( TYPE, NAME )                            \
-  static TYPE get##NAME(int idx1, int idx2) { return m_##NAME[idx1][idx2]; } \
-  static void set##NAME(int idx1, int idx2, TYPE val) { m_##NAME[idx1][idx2] = val; }
-
-#define array3d_accessor_true( TYPE, NAME )
-#define array3d_accessor_false( TYPE, NAME )                            \
-  static TYPE get##NAME(int idx1, int idx2, int idx3) { return m_##NAME[idx1][idx2][idx3]; } \
-  static void set##NAME(int idx1, int idx2, int idx3, TYPE val) { m_##NAME[idx1][idx2][idx3] = val; }
-
-#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )   \
-  accessor_##CUSTOM_ACCESSOR(int32,NAME)
-#define PARAM_UINT( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )      \
-  accessor_##CUSTOM_ACCESSOR(uint32,NAME)
-#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )     \
-  accessor_##CUSTOM_ACCESSOR(uint64,NAME)
-#define PARAM_BOOL( NAME, DEFAULT_VALUE,CUSTOM_ACCESSOR )       \
-  accessor_##CUSTOM_ACCESSOR(bool,NAME)
-#define PARAM_DOUBLE( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )    \
-  accessor_##CUSTOM_ACCESSOR(double,NAME)
-#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )    \
-  accessor_##CUSTOM_ACCESSOR(const char*,NAME)
-#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  array_accessor_##CUSTOM_ACCESSOR(TYPE, NAME, DEFAULT_ARRAY_SIZE)
-#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  array2d_accessor_##CUSTOM_ACCESSOR(TYPE, NAME)
-#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  array3d_accessor_##CUSTOM_ACCESSOR(TYPE, NAME)
-#include "mem/ruby/config/config.hh"
-#undef PARAM
-#undef PARAM_UINT
-#undef PARAM_ULONG
-#undef PARAM_BOOL
-#undef PARAM_DOUBLE
-#undef PARAM_STRING
-#undef PARAM_ARRAY
-#undef PARAM_ARRAY2D
-#undef PARAM_ARRAY3D
-
-private:
-  static uint32 m_data_block_mask;
-
-#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )   \
-  static int32  m_##NAME;
-#define PARAM_UINT( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )      \
-  static uint32 m_##NAME;
-#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )     \
-  static uint64 m_##NAME;
-#define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )      \
-  static bool   m_##NAME;
-#define PARAM_DOUBLE( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )    \
-  static double m_##NAME;
-#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR )    \
-  static const char  *m_##NAME;
-#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  static TYPE* m_##NAME;
-#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  static TYPE** m_##NAME;
-#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
-  static TYPE*** m_##NAME;
-#include "mem/ruby/config/config.hh"
-#undef PARAM
-#undef PARAM_UINT
-#undef PARAM_ULONG
-#undef PARAM_BOOL
-#undef PARAM_DOUBLE
-#undef PARAM_STRING
-#undef PARAM_ARRAY
-#undef PARAM_ARRAY2D
-#undef PARAM_ARRAY3D
-
-};
-
-#endif //RUBYCONFIG_H
diff --git a/src/mem/ruby/eventqueue/RubyEventQueue.cc b/src/mem/ruby/eventqueue/RubyEventQueue.cc
index 1a4159f1d..3adc0d22e 100644
--- a/src/mem/ruby/eventqueue/RubyEventQueue.cc
+++ b/src/mem/ruby/eventqueue/RubyEventQueue.cc
@@ -32,7 +32,6 @@
  */
 
 #include "mem/ruby/eventqueue/RubyEventQueue.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Consumer.hh"
 #include "mem/ruby/profiler/Profiler.hh"
 #include "mem/ruby/system/System.hh"
diff --git a/src/mem/ruby/filters/AbstractBloomFilter.hh b/src/mem/ruby/filters/AbstractBloomFilter.hh
index 7e37a6e06..89aeb25a6 100644
--- a/src/mem/ruby/filters/AbstractBloomFilter.hh
+++ b/src/mem/ruby/filters/AbstractBloomFilter.hh
@@ -39,7 +39,6 @@
 #define ABSTRACT_BLOOM_FILTER_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 
 class AbstractBloomFilter {
diff --git a/src/mem/ruby/filters/BlockBloomFilter.hh b/src/mem/ruby/filters/BlockBloomFilter.hh
index 205b4172d..be9faa443 100644
--- a/src/mem/ruby/filters/BlockBloomFilter.hh
+++ b/src/mem/ruby/filters/BlockBloomFilter.hh
@@ -40,7 +40,6 @@
 
 #include "mem/gems_common/Map.hh"
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/BulkBloomFilter.hh b/src/mem/ruby/filters/BulkBloomFilter.hh
index 2dbdb6612..089531791 100644
--- a/src/mem/ruby/filters/BulkBloomFilter.hh
+++ b/src/mem/ruby/filters/BulkBloomFilter.hh
@@ -40,7 +40,6 @@
 
 #include "mem/gems_common/Map.hh"
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/GenericBloomFilter.cc b/src/mem/ruby/filters/GenericBloomFilter.cc
index f4198ef40..22c75d64c 100644
--- a/src/mem/ruby/filters/GenericBloomFilter.cc
+++ b/src/mem/ruby/filters/GenericBloomFilter.cc
@@ -36,7 +36,6 @@
  */
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 
 #include "mem/ruby/filters/GenericBloomFilter.hh"
diff --git a/src/mem/ruby/filters/GenericBloomFilter.hh b/src/mem/ruby/filters/GenericBloomFilter.hh
index 4ff65f404..edee22f84 100644
--- a/src/mem/ruby/filters/GenericBloomFilter.hh
+++ b/src/mem/ruby/filters/GenericBloomFilter.hh
@@ -39,7 +39,6 @@
 #define GENERIC_BLOOM_FILTER_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/H3BloomFilter.hh b/src/mem/ruby/filters/H3BloomFilter.hh
index cde923b0b..360000540 100644
--- a/src/mem/ruby/filters/H3BloomFilter.hh
+++ b/src/mem/ruby/filters/H3BloomFilter.hh
@@ -42,7 +42,6 @@
 #include "mem/ruby/common/Global.hh"
 #include "mem/ruby/system/System.hh"
 #include "mem/ruby/profiler/Profiler.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/LSB_CountingBloomFilter.hh b/src/mem/ruby/filters/LSB_CountingBloomFilter.hh
index 7a0f71fad..bfa2673fe 100644
--- a/src/mem/ruby/filters/LSB_CountingBloomFilter.hh
+++ b/src/mem/ruby/filters/LSB_CountingBloomFilter.hh
@@ -40,7 +40,6 @@
 
 #include "mem/gems_common/Map.hh"
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/MultiBitSelBloomFilter.hh b/src/mem/ruby/filters/MultiBitSelBloomFilter.hh
index 390b7c37c..360cbfdff 100644
--- a/src/mem/ruby/filters/MultiBitSelBloomFilter.hh
+++ b/src/mem/ruby/filters/MultiBitSelBloomFilter.hh
@@ -42,7 +42,6 @@
 #include "mem/ruby/common/Global.hh"
 #include "mem/ruby/system/System.hh"
 #include "mem/ruby/profiler/Profiler.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/MultiGrainBloomFilter.hh b/src/mem/ruby/filters/MultiGrainBloomFilter.hh
index 66a32ecd4..4e9bc70a2 100644
--- a/src/mem/ruby/filters/MultiGrainBloomFilter.hh
+++ b/src/mem/ruby/filters/MultiGrainBloomFilter.hh
@@ -40,7 +40,6 @@
 
 #include "mem/gems_common/Map.hh"
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/filters/NonCountingBloomFilter.hh b/src/mem/ruby/filters/NonCountingBloomFilter.hh
index 27045ebc9..fd23fbdf7 100644
--- a/src/mem/ruby/filters/NonCountingBloomFilter.hh
+++ b/src/mem/ruby/filters/NonCountingBloomFilter.hh
@@ -40,7 +40,6 @@
 
 #include "mem/gems_common/Map.hh"
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/filters/AbstractBloomFilter.hh"
 
diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh
index 5730d6591..17fbaab22 100644
--- a/src/mem/ruby/network/Network.hh
+++ b/src/mem/ruby/network/Network.hh
@@ -50,7 +50,6 @@
 #include "mem/ruby/system/NodeID.hh"
 #include "mem/protocol/MessageSizeType.hh"
 #include "mem/ruby/system/System.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 
 class NetDest;
 class MessageBuffer;
diff --git a/src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh b/src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh
index 33af28a7e..0a450c002 100644
--- a/src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh
+++ b/src/mem/ruby/network/garnet-flexible-pipeline/NetworkConfig.hh
@@ -40,7 +40,6 @@
 
 #include "mem/ruby/network/garnet-fixed-pipeline/NetworkHeader.hh"
 #include "mem/gems_common/util.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 
 class NetworkConfig {
         private:
@@ -65,80 +64,11 @@ class NetworkConfig {
                      m_using_network_testing = atoi(argv[i+1].c_str());
                   }
                 }
-//              static bool isGarnetNetwork() {return RubyConfig::getUsingGarnetNetwork(); }
-//              static bool isDetailNetwork() {return RubyConfig::getUsingDetailNetwork(); }
                 bool isNetworkTesting() {return m_using_network_testing; }
                 int getFlitSize() {return m_flit_size; }
                 int getNumPipeStages() {return m_number_of_pipe_stages; }
                 int getVCsPerClass() {return m_vcs_per_class; }
                 int getBufferSize() {return m_buffer_size; }
-  // This is no longer used. See config/rubyconfig.defaults to set Garnet parameters.
-                static void readNetConfig()
-                {
-      /*
-                        string filename = "network/garnet-flexible-pipeline/";
-                        filename += NETCONFIG_DEFAULTS;
-
-                if (g_SIMICS) {
-                        filename = "../../../ruby/"+filename;
-                }
-                        ifstream NetconfigFile( filename.c_str(), ios::in);
-                        if(!NetconfigFile.is_open())
-                        {
-                                cout << filename << endl;
-                                cerr << "Network Configuration file cannot be opened\n";
-                                exit(1);
-                        }
-
-                        string line = "";
-
-                        while(!NetconfigFile.eof())
-                        {
-                                getline(NetconfigFile, line, '\n');
-                                string var = string_split(line, ':');
-
-                                if(!var.compare("RubyConfig::getUsingGarnetNetwork()"))
-                                {
-                                        if(!line.compare("true"))
-                                                RubyConfig::getUsingGarnetNetwork() = true;
-                                        else
-                                                RubyConfig::getUsingGarnetNetwork() = false;
-                                }
-                                if(!var.compare("RubyConfig::getUsingDetailNetwork()"))
-                                {
-                                        if(!line.compare("true"))
-                                                RubyConfig::getUsingDetailNetwork() = true;
-                                        else
-                                                RubyConfig::getUsingDetailNetwork() = false;
-                                }
-                                if(!var.compare("g_NETWORK_TESTING"))
-                                {
-                                        if(!line.compare("true"))
-                                                g_NETWORK_TESTING = true;
-                                        else
-                                                g_NETWORK_TESTING = false;
-                                }
-                                if(!var.compare("RubyConfig::getFlitSize()"))
-                                        RubyConfig::getFlitSize() = atoi(line.c_str());
-                                if(!var.compare("RubyConfig::getNumberOfPipeStages()"))
-                                        RubyConfig::getNumberOfPipeStages() = atoi(line.c_str());
-                                if(!var.compare("RubyConfig::getVCSPerClass()"))
-                                        RubyConfig::getVCSPerClass() = atoi(line.c_str());
-                                if(!var.compare("RubyConfig::getBufferSize()"))
-                                        RubyConfig::getBufferSize() = atoi(line.c_str());
-                        }
-                        NetconfigFile.close();
-      */
-      /*
-      cout << "RubyConfig::getUsingGarnetNetwork() = " << RubyConfig::getUsingGarnetNetwork() << endl;
-      cout << "RubyConfig::getUsingDetailNetwork() = " << RubyConfig::getUsingDetailNetwork() << endl;
-      cout << "g_NETWORK_TESTING = " << g_NETWORK_TESTING << endl;
-      cout << "RubyConfig::getFlitSize() = " << RubyConfig::getFlitSize() << endl;
-      cout << "RubyConfig::getNumberOfPipeStages() = " << RubyConfig::getNumberOfPipeStages() << endl;
-      cout << "RubyConfig::getVCSPerClass()= " << RubyConfig::getVCSPerClass() << endl;
-      cout << "RubyConfig::getBufferSize() = " << RubyConfig::getBufferSize() << endl;
-      */
-                }
 };
 
 
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc
index b617ae939..02fc8db2a 100644
--- a/src/mem/ruby/network/simple/PerfectSwitch.cc
+++ b/src/mem/ruby/network/simple/PerfectSwitch.cc
@@ -88,9 +88,7 @@ void PerfectSwitch::addOutPort(const Vector<MessageBuffer*>& out, const NetDest&
   m_out.insertAtBottom(out);
   m_routing_table.insertAtBottom(routing_table_entry);
 
-  //  if (RubyConfig::getPrintTopology()) {
-    m_out_link_vec.insertAtBottom(out);
-    //  }
+  m_out_link_vec.insertAtBottom(out);
 }
 
 void PerfectSwitch::clearRoutingTables()
@@ -187,7 +185,6 @@ void PerfectSwitch::wakeup()
         assert(m_link_order.size() == m_routing_table.size());
         assert(m_link_order.size() == m_out.size());
 //changed by SS
-//        if (RubyConfig::getAdaptiveRouting()) {
         if (m_network_ptr->getAdaptiveRouting()) {
           if (m_network_ptr->isVNetOrdered(vnet)) {
             // Don't adaptively route
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index e5cbfefd8..497c602d1 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -101,42 +101,7 @@ void SimpleNetwork::init(const vector<string> & argv)
   }
   m_topology_ptr->createLinks(false);  // false because this isn't a reconfiguration
 }
-/*
-SimpleNetwork::SimpleNetwork(int nodes)
-{
-  m_nodes = MachineType_base_number(MachineType_NUM);
-
-  m_virtual_networks = RubyConfig::getNumberOfVirtualNetworks();
-  m_endpoint_switches.setSize(m_nodes);
-
-  m_in_use.setSize(m_virtual_networks);
-  m_ordered.setSize(m_virtual_networks);
-  for (int i = 0; i < m_virtual_networks; i++) {
-    m_in_use[i] = false;
-    m_ordered[i] = false;
-  }
 
-  // Allocate to and from queues
-  m_toNetQueues.setSize(m_nodes);
-  m_fromNetQueues.setSize(m_nodes);
-  for (int node = 0; node < m_nodes; node++) {
-    m_toNetQueues[node].setSize(m_virtual_networks);
-    m_fromNetQueues[node].setSize(m_virtual_networks);
-    for (int j = 0; j < m_virtual_networks; j++) {
-      m_toNetQueues[node][j] = new MessageBuffer;
-      m_fromNetQueues[node][j] = new MessageBuffer;
-    }
-  }
-
-  // Setup the network switches
-  m_topology_ptr = new Topology(this, m_nodes);
-  int number_of_switches = m_topology_ptr->numSwitches();
-  for (int i=0; i<number_of_switches; i++) {
-    m_switch_ptr_vector.insertAtBottom(new Switch(i, this));
-  }
-  m_topology_ptr->createLinks(false);  // false because this isn't a reconfiguration
-}
-*/
 void SimpleNetwork::reset()
 {
   for (int node = 0; node < m_nodes; node++) {
diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc
index ce69c47be..64cb2a33a 100644
--- a/src/mem/ruby/network/simple/Throttle.cc
+++ b/src/mem/ruby/network/simple/Throttle.cc
@@ -103,9 +103,7 @@ void Throttle::addLinks(const Vector<MessageBuffer*>& in_vec, const Vector<Messa
     }
   }
 
-  //  if (RubyConfig::getPrintTopology()) {
-    m_out_link_vec.insertAtBottom(out_vec);
-    //  }
+  m_out_link_vec.insertAtBottom(out_vec);
 }
 
 void Throttle::addVirtualNetwork(MessageBuffer* in_ptr, MessageBuffer* out_ptr)
diff --git a/src/mem/ruby/network/simple/Topology.cc b/src/mem/ruby/network/simple/Topology.cc
index 3535f790b..dedf79d58 100644
--- a/src/mem/ruby/network/simple/Topology.cc
+++ b/src/mem/ruby/network/simple/Topology.cc
@@ -40,7 +40,6 @@
 #include "mem/ruby/common/NetDest.hh"
 #include "mem/ruby/network/Network.hh"
 #include "mem/protocol/TopologyType.hh"
-//#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/gems_common/util.hh"
 #include "mem/protocol/MachineType.hh"
 #include "mem/protocol/Protocol.hh"
@@ -294,82 +293,6 @@ void Topology::createLinks(bool isReconfiguration)
     }
   }
 }
-/*
-void Topology::makeSwitchesPerChip(Vector< Vector < SwitchID > > &nodePairs, Vector<int> &latencies, Vector<int> &bw_multis, int numberOfChipSwitches)
-{
-
-  Vector < SwitchID > nodes;  // temporary buffer
-  nodes.setSize(2);
-
-  Vector<bool> endpointConnectionExist;  // used to ensure all endpoints are connected to the network
-  endpointConnectionExist.setSize(m_nodes);
-  // initialize endpoint check vector
-  for (int k = 0; k < endpointConnectionExist.size(); k++) {
-    endpointConnectionExist[k] = false;
-  }
-
-  Vector<int> componentCount;
-  componentCount.setSize(MachineType_NUM);
-  for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
-    componentCount[mType] = 0;
-  }
-
-  // components to/from network links
-  // TODO: drh5: bring back chips!!!
-  for (int chip = 0; chip < RubyConfig::getNumberOfChips(); chip++) {
-    for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
-      for (int component = 0; component < MachineType_base_count(mType); component++) {
-
-        int latency = -1;
-        int bw_multiplier = -1;  // internal link bw multiplier of the global bandwidth
-        if (mType != MachineType_Directory) {
-          latency = RubyConfig::getOnChipLinkLatency();  // internal link latency
-          bw_multiplier = 10;  // internal link bw multiplier of the global bandwidth
-        } else {
-          latency = RubyConfig::getNetworkLinkLatency();  // local memory latency
-          bw_multiplier = 1;  // local memory link bw multiplier of the global bandwidth
-        }
-        nodes[0] = MachineType_base_number(mType)+componentCount[mType];
-        nodes[1] = chip+m_nodes*2; // this is the chip's internal switch id #
-
-        // insert link
-        nodePairs.insertAtBottom(nodes);
-        latencies.insertAtBottom(latency);
-        bw_multis.insertAtBottom(bw_multiplier);
-        //bw_multis.insertAtBottom(componentCount[mType]+MachineType_base_number((MachineType)mType));
-
-        // opposite direction link
-        Vector < SwitchID > otherDirectionNodes;
-        otherDirectionNodes.setSize(2);
-        otherDirectionNodes[0] = nodes[1];
-        otherDirectionNodes[1] = nodes[0]+m_nodes;
-        nodePairs.insertAtBottom(otherDirectionNodes);
-        latencies.insertAtBottom(latency);
-        bw_multis.insertAtBottom(bw_multiplier);
-
-        assert(!endpointConnectionExist[nodes[0]]);
-        endpointConnectionExist[nodes[0]] = true;
-        componentCount[mType]++;
-      }
-    }
-  }
-
-  // make sure all enpoints are connected in the soon to be created network
-  for (int k = 0; k < endpointConnectionExist.size(); k++) {
-    if (endpointConnectionExist[k] == false) {
-      cerr << "Error: Unconnected Endpoint: " << k << endl;
-      exit(1);
-    }
-  }
-
-  // secondary check to ensure we saw the correct machine counts
-  for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
-    assert(componentCount[mType] == MachineType_base_count((MachineType)mType));
-  }
-
-}
-*/
-
 
 SwitchID Topology::newSwitchID()
 {
diff --git a/src/mem/ruby/profiler/AccessTraceForAddress.hh b/src/mem/ruby/profiler/AccessTraceForAddress.hh
index 5bb0cc545..2761d6de8 100644
--- a/src/mem/ruby/profiler/AccessTraceForAddress.hh
+++ b/src/mem/ruby/profiler/AccessTraceForAddress.hh
@@ -38,7 +38,6 @@
 #define ACCESSTRACEFORADDRESS_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/protocol/CacheRequestType.hh"
 #include "mem/protocol/AccessModeType.hh"
diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc
index e067d3a0f..51e3e8398 100644
--- a/src/mem/ruby/profiler/Profiler.cc
+++ b/src/mem/ruby/profiler/Profiler.cc
@@ -98,31 +98,6 @@ Profiler::Profiler(const string & name)
   m_stats_period = 1000000; // Default
   m_periodic_output_file_ptr = &cerr;
 
-//changed by SS
-/*
-  // for MemoryControl:
-  m_memReq = 0;
-  m_memBankBusy = 0;
-  m_memBusBusy = 0;
-  m_memReadWriteBusy = 0;
-  m_memDataBusBusy = 0;
-  m_memTfawBusy = 0;
-  m_memRefresh = 0;
-  m_memRead = 0;
-  m_memWrite = 0;
-  m_memWaitCycles = 0;
-  m_memInputQ = 0;
-  m_memBankQ = 0;
-  m_memArbWait = 0;
-  m_memRandBusy = 0;
-  m_memNotOld = 0;
-
-
-  int totalBanks = RubyConfig::banksPerRank()
-                 * RubyConfig::ranksPerDimm()
-                 * RubyConfig::dimmsPerChannel();
-  m_memBankCount.setSize(totalBanks);
-*/
 }
 
 Profiler::~Profiler()
@@ -870,7 +845,7 @@ void Profiler::addAddressTraceSample(const CacheMsg& msg, NodeID id)
     // Note: The following line should be commented out if you want to
     // use the special profiling that is part of the GS320 protocol
 
-    // NOTE: Unless PROFILE_HOT_LINES or RubyConfig::getProfileAllInstructions() are enabled, nothing will be profiled by the AddressProfiler
+    // NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be profiled by the AddressProfiler
     m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false);
   }
 }
diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh
index 4731c7138..e04994fcb 100644
--- a/src/mem/ruby/profiler/Profiler.hh
+++ b/src/mem/ruby/profiler/Profiler.hh
@@ -58,7 +58,6 @@
 
 #include "mem/ruby/common/Global.hh"
 #include "mem/protocol/GenericMachineType.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Histogram.hh"
 #include "mem/ruby/common/Consumer.hh"
 #include "mem/protocol/AccessModeType.hh"
diff --git a/src/mem/ruby/profiler/StoreTrace.hh b/src/mem/ruby/profiler/StoreTrace.hh
index a71636364..5cdf7ce41 100644
--- a/src/mem/ruby/profiler/StoreTrace.hh
+++ b/src/mem/ruby/profiler/StoreTrace.hh
@@ -38,7 +38,6 @@
 #define StoreTrace_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/common/Histogram.hh"
 
diff --git a/src/mem/ruby/recorder/Tracer.cc b/src/mem/ruby/recorder/Tracer.cc
index 5b1e4274b..a0a3b22b7 100644
--- a/src/mem/ruby/recorder/Tracer.cc
+++ b/src/mem/ruby/recorder/Tracer.cc
@@ -37,7 +37,6 @@
 #include "mem/ruby/eventqueue/RubyEventQueue.hh"
 #include "mem/gems_common/PrioHeap.hh"
 #include "mem/ruby/system/System.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 
 //added by SS
 Tracer::Tracer(const string & name)
@@ -130,8 +129,8 @@ int Tracer::playbackTrace(string filename)
     ok = record.input(in);
 
     // Clear the statistics after warmup
-/*    if (counter == RubyConfig::getTraceWarmupLength()) {
-      cout << "Clearing stats after warmup of length " << RubyConfig::getTraceWarmupLength() << endl;
+/*    if (counter == m_warmup_length) {
+      cout << "Clearing stats after warmup of length " << m_warmup_length << endl;
       g_system_ptr->clearStats();
     }
 */
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
index 9ece7ae65..cd3cdbe48 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
@@ -35,7 +35,6 @@
 #define COMPONENTMAPPINGFNS_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/system/NodeID.hh"
 #include "mem/ruby/system/MachineID.hh"
 #include "mem/ruby/common/Address.hh"
@@ -62,77 +61,6 @@
 #define MACHINETYPE_L3CACHE_ENUM MachineType_NUM
 #endif
 
-/*
-#ifdef MACHINETYPE_PersistentArbiter
-#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_PersistentArbiter
-#else
-#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_NUM
-#endif
-*/
-/*
-inline MachineID map_Address_to_L2Cache(const Address & addr)
-{
-  int L2bank = 0;
-  MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
-  L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
-                          RubySystem::getBlockSizeBits() + RubyConfig::getNumberOfCachesPerLevel(2)-1);
-  mach.num = L2bank;
-  return mach;
-}
-
-// input parameter is the base ruby node of the L1 cache
-// returns a value between 0 and total_L2_Caches_within_the_system
-inline
-MachineID map_L1CacheMachId_to_L2Cache(const Address& addr, MachineID L1CacheMachId)
-{
-  return map_Address_to_L2Cache(addr);
-
-  int L2bank = 0;
-  MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
-
-  if (RubyConfig::L2CachePerChipBits() > 0) {
-    if (RubyConfig::getMAP_L2BANKS_TO_LOWEST_BITS()) {
-      L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
-                         RubySystem::getBlockSizeBits()+RubyConfig::L2CachePerChipBits()-1);
-    } else {
-      L2bank = addr.bitSelect(RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS(),
-                         RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS()+RubyConfig::L2CachePerChipBits()-1);
-    }
-  }
-
-  assert(L2bank < RubyConfig::numberOfL2CachePerChip());
-  assert(L2bank >= 0);
-
-  mach.num = RubyConfig::L1CacheNumToL2Base(L1CacheMachId.num)*RubyConfig::numberOfL2CachePerChip() // base #
-    + L2bank;  // bank #
-  assert(mach.num < RubyConfig::numberOfL2Cache());
-  return mach;
-
-}
-
-
-// used to determine the correct L2 bank
-// input parameter is the base ruby node of the L2 cache
-// returns a value between 0 and total_L2_Caches_within_the_system
-
-inline
-MachineID map_L2ChipId_to_L2Cache(const Address& addr, NodeID L2ChipId)
-{
-  return map_Address_to_L2Cache(addr);
-
-  assert(L2ChipId < RubyConfig::numberOfChips());
-
-  int L2bank = 0;
-  MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
-  L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
-                          RubySystem::getBlockSizeBits() + RubyConfig::numberOfCachesPerLevel(2)-1);
-  mach.num = L2bank;
-  return mach
-
-}
-  */
-
-
 // used to determine the home directory
 // returns a value between 0 and total_directories_within_the_system
 inline
@@ -157,29 +85,8 @@ MachineID map_Address_to_DMA(const Address & addr)
   return dma;
 }
 
-/*
-inline
-NetDest getOtherLocalL1IDs(MachineID L1)
-{
-  int start = (L1.num / RubyConfig::numberOfProcsPerChip()) * RubyConfig::numberOfProcsPerChip();
-  NetDest ret;
-
-  assert(MACHINETYPE_L1CACHE_ENUM != MachineType_NUM);
-
-  for (int i = start; i < (start + RubyConfig::numberOfProcsPerChip()); i++) {
-    if (i != L1.num) {
-      MachineID mach = { MACHINETYPE_L1CACHE_ENUM, i };
-      ret.add( mach );
-    }
-  }
-
-  return ret;
-}
-*/
-
 extern inline NodeID machineIDToNodeID(MachineID machID)
 {
-  // return machID.num%RubyConfig::numberOfChips();
   return machID.num;
 }
 
@@ -193,22 +100,7 @@ extern inline NodeID L1CacheMachIDToProcessorNum(MachineID machID)
   assert(machID.type == MachineType_L1Cache);
   return machID.num;
 }
-/*
-extern inline NodeID L2CacheMachIDToChipID(MachineID machID)
-{
-  assert(machID.type == MACHINETYPE_L2CACHE_ENUM);
-  int L2bank = machID.num;
-  int banks_seen = 0;
-  for (int i=0;i<RubyConfig::getNumberOfChips();i++) {
-    for (int j=0;j<RubyConfig::getNumberOfCachesPerLevelPerChip(2,i);j++) {
-      if (banks_seen == L2bank)
-        return i;
-      banks_seen++;
-    }
-  }
-  assert(0);
-}
-*/
+
 extern inline MachineID getL1MachineID(NodeID L1RubyNode)
 {
   MachineID mach = {MACHINETYPE_L1CACHE_ENUM, L1RubyNode};
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
index d8692951e..e4e20c99a 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
@@ -43,7 +43,6 @@
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/system/NodeID.hh"
 #include "mem/ruby/system/MachineID.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/protocol/CacheMsg.hh"
 #include "mem/protocol/GenericRequestType.hh"
 #include "mem/protocol/CacheRequestType.hh"
@@ -112,19 +111,6 @@ extern inline int MessageSizeTypeToInt(MessageSizeType size_type)
   return MessageSizeType_to_int(size_type);
 }
 
-/*
-extern inline int numberOfNodes()
-{
-  return RubyConfig::numberOfChips();
-}
-*/
-/*
-extern inline int numberOfL1CachePerChip()
-{
-  return RubyConfig::getNumberOfCachesPerLevelPerChip(1,0);
-}
-*/
-
 extern inline bool long_enough_ago(Time event)
 {
   return ((get_time() - event) > 200);
@@ -171,40 +157,6 @@ extern inline Time time_to_int(Time time)
   return time;
 }
 
-/*
-extern inline bool getFilteringEnabled()
-{
-  return RubyConfig::getFilteringEnabled();
-}
-
-
-extern inline int getRetryThreshold()
-{
-  return RubyConfig::getRetryThreshold();
-}
-
-extern inline int getFixedTimeoutLatency()
-{
-  return RubyConfig::getFixedTimeoutLatency();
-}
-
-extern inline int N_tokens()
-{
-  // return N+1 to handle clean writeback
-  return RubyConfig::getProcsPerChip() + 1;
-  // return 1;
-}
-
-extern inline bool distributedPersistentEnabled()
-{
-  return RubyConfig::getDistributedPersistentEnabled();
-}
-
-extern inline bool getDynamicTimeoutEnabled()
-{
-  return RubyConfig::getDynamicTimeoutEnabled();
-}
-*/
 // Appends an offset to an address
 extern inline Address setOffset(Address addr, int offset)
 {
diff --git a/src/mem/ruby/system/AbstractMemOrCache.hh b/src/mem/ruby/system/AbstractMemOrCache.hh
index 641c117de..845ce66ea 100644
--- a/src/mem/ruby/system/AbstractMemOrCache.hh
+++ b/src/mem/ruby/system/AbstractMemOrCache.hh
@@ -11,7 +11,6 @@
 #define ABSTRACT_MEM_OR_CACHE_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 
 class AbstractMemOrCache {
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh
index 625d5ce59..c3b7da6ea 100644
--- a/src/mem/ruby/system/CacheMemory.hh
+++ b/src/mem/ruby/system/CacheMemory.hh
@@ -160,45 +160,7 @@ private:
 
   static Vector< CacheMemory* > m_all_caches;
 };
-/*
-inline
-CacheMemory* CacheMemory::getCache(int cache_id)
-{
-  assert(cache_id < RubyConfig::getNumberOfCaches());
-  if (m_all_caches[cache_id] == NULL) {
-    cerr << "ERROR: Tried to obtain CacheMemory that hasn't been created yet." << endl;
-    assert(0);
-  }
-  return m_all_caches[cache_id];
-}
-
-inline
-CacheMemory* CacheMemory::createCache(int level, int num, char split_type_c, AbstractCacheEntry* (*entry_factory)())
-{
-  string split_type;
-  switch(split_type_c) {
-  case 'i':
-    split_type = "instruction"; break;
-  case 'd':
-    split_type = "data"; break;
-  default:
-    split_type = "unified"; break;
-  }
-  int cache_id = RubyConfig::getCacheIDFromParams(level, num, split_type);
-  assert(cache_id < RubyConfig::getNumberOfCaches());
-  if (m_all_caches.size() == 0) {
-    m_all_caches.setSize(RubyConfig::getNumberOfCaches());
-    for (int i=0; i<m_all_caches.size(); i++)
-      m_all_caches[i] = NULL;
-  }
 
-  string type = RubyConfig::getCacheType(cache_id);
-  if ( type == "SetAssociativeCache" ) {
-    m_all_caches[cache_id] = new CacheMemory(cache_id, entry_factory);
-  }
-  return m_all_caches[cache_id];
-}
-*/
 // Output operator declaration
 //ostream& operator<<(ostream& out, const CacheMemory<ENTRY>& obj);
 
@@ -266,43 +228,7 @@ void CacheMemory::init(const vector<string> & argv)
     }
   }
 }
-/*
-inline
-CacheMemory::CacheMemory(int cache_id, AbstractCacheEntry* (*entry_factory)())
-{
-  string split_type;
-
-  m_cache_id = cache_id;
-  m_entry_factory = entry_factory;
-
-  m_cache_num_set_bits = RubyConfig::getNumberOfCacheSetBits(cache_id);
-  m_cache_num_sets = RubyConfig::getNumberOfCacheSets(cache_id);
-  m_cache_assoc = RubyConfig::getCacheAssoc(cache_id);
-  split_type = RubyConfig::getCacheSplitType(cache_id);
-  m_is_instruction_only_cache = m_is_data_only_cache = false;
-  if (split_type == "instruction")
-    m_is_instruction_only_cache = true;
-  else if (split_type == "data")
-    m_is_data_only_cache = true;
-  else
-    assert(split_type == "unified");
-
-  if(RubyConfig::getCacheReplacementPolicy(cache_id) == "PSEUDO_LRU")
-    m_replacementPolicy_ptr = new PseudoLRUPolicy(m_cache_num_sets, m_cache_assoc);
-  else if(RubyConfig::getCacheReplacementPolicy(cache_id) == "LRU")
-    m_replacementPolicy_ptr = new LRUPolicy(m_cache_num_sets, m_cache_assoc);
-  else
-    assert(false);
 
-  m_cache.setSize(m_cache_num_sets);
-  for (int i = 0; i < m_cache_num_sets; i++) {
-    m_cache[i].setSize(m_cache_assoc);
-    for (int j = 0; j < m_cache_assoc; j++) {
-      m_cache[i][j] = m_entry_factory();
-    }
-  }
-}
-*/
 inline
 CacheMemory::~CacheMemory()
 {
diff --git a/src/mem/ruby/system/DirectoryMemory.cc b/src/mem/ruby/system/DirectoryMemory.cc
index 294d57de2..b279d21af 100644
--- a/src/mem/ruby/system/DirectoryMemory.cc
+++ b/src/mem/ruby/system/DirectoryMemory.cc
@@ -39,7 +39,6 @@
 #include "mem/ruby/system/System.hh"
 #include "mem/ruby/system/DirectoryMemory.hh"
 #include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/slicc_interface/AbstractController.hh"
 #include "mem/gems_common/util.hh"
 
diff --git a/src/mem/ruby/system/PerfectCacheMemory.hh b/src/mem/ruby/system/PerfectCacheMemory.hh
index 9d647822c..90c9273e5 100644
--- a/src/mem/ruby/system/PerfectCacheMemory.hh
+++ b/src/mem/ruby/system/PerfectCacheMemory.hh
@@ -42,7 +42,6 @@
 #include "mem/ruby/common/Global.hh"
 #include "mem/gems_common/Map.hh"
 #include "mem/protocol/AccessPermission.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Address.hh"
 #include "mem/ruby/slicc_interface/AbstractChip.hh"
 
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 1587aa5fa..693e931aa 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -490,183 +490,3 @@ void Sequencer::checkCoherence(const Address& addr) {
 #endif
 }
 
-/*
-bool Sequencer::getRubyMemoryValue(const Address& addr, char* value,
-                                   unsigned int size_in_bytes )
-{
-    bool found = false;
-    const Address lineAddr = line_address(addr);
-    DataBlock data;
-    PhysAddress paddr(addr);
-    DataBlock* dataPtr = &data;
-
-    MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() );
-    int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip();
-
-    if (Protocol::m_TwoLevelCache) {
-      if(Protocol::m_CMP){
-        assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL);
-      }
-      else{
-        assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL);
-      }
-    }
-
-    if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){
-      n->m_L1Cache_L1IcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes);
-      found = true;
-    } else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
-      n->m_L1Cache_L1DcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes);
-      found = true;
-    } else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
-      n->m_L2Cache_L2cacheMemory_vec[l2_ver]->getMemoryValue(addr, value, size_in_bytes);
-      found = true;
-    // } else if (n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)){
-//       ASSERT(n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr));
-//       L1Cache_TBE tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
-
-//       int offset = addr.getOffset();
-//       for(int i=0; i<size_in_bytes; ++i){
-//         value[i] = tbeEntry.getDataBlk().getByte(offset + i);
-//       }
-
-//       found = true;
-    } else {
-      // Address not found
-      //cout << "  " << m_chip_ptr->getID() << " NOT IN CACHE, Value at Directory is: " << (int) value[0] << endl;
-      n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip()));
-      int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip();
-      for(unsigned int i=0; i<size_in_bytes; ++i){
-        int offset = addr.getOffset();
-        value[i] = n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.getByte(offset + i);
-      }
-      // Address not found
-      //WARN_MSG("Couldn't find address");
-      //WARN_EXPR(addr);
-      found = false;
-    }
-    return true;
-}
-
-bool Sequencer::setRubyMemoryValue(const Address& addr, char *value,
-                                   unsigned int size_in_bytes) {
-  char test_buffer[64];
-
-  // idea here is that coherent cache should find the
-  // latest data, the update it
-  bool found = false;
-  const Address lineAddr = line_address(addr);
-  PhysAddress paddr(addr);
-  DataBlock data;
-  DataBlock* dataPtr = &data;
-  Chip* n = dynamic_cast<Chip*>(m_chip_ptr);
-
-  MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() );
-  int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip();
-
-  assert(n->m_L1Cache_L1IcacheMemory_vec[m_version] != NULL);
-  assert(n->m_L1Cache_L1DcacheMemory_vec[m_version] != NULL);
-  if (Protocol::m_TwoLevelCache) {
-    if(Protocol::m_CMP){
-      assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL);
-    }
-    else{
-      assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL);
-    }
-  }
-
-  if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){
-    n->m_L1Cache_L1IcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes);
-    found = true;
-  } else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
-    n->m_L1Cache_L1DcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes);
-    found = true;
-  } else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
-    n->m_L2Cache_L2cacheMemory_vec[l2_ver]->setMemoryValue(addr, value, size_in_bytes);
-    found = true;
-  } else {
-    // Address not found
-    n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip()));
-    int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip();
-    for(unsigned int i=0; i<size_in_bytes; ++i){
-      int offset = addr.getOffset();
-      n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.setByte(offset + i, value[i]);
-    }
-    found = false;
-  }
-
-  if (found){
-    found = getRubyMemoryValue(addr, test_buffer, size_in_bytes);
-    assert(found);
-    if(value[0] != test_buffer[0]){
-      WARN_EXPR((int) value[0]);
-      WARN_EXPR((int) test_buffer[0]);
-      ERROR_MSG("setRubyMemoryValue failed to set value.");
-    }
-  }
-
-  return true;
-}
-*/
-/*
-
-void
-Sequencer::rubyMemAccess(const uint64 paddr, char* data, const int len, const AccessType type)
-{
-  if ( type == AccessType_Read || type == AccessType_Write ) {
-    // need to break up the packet data
-    uint64 guest_ptr = paddr;
-    Vector<DataBlock*> datablocks;
-    while (paddr + len != guest_ptr) {
-      Address addr(guest_ptr);
-      Address line_addr = line_address(addr);
-
-      int bytes_copied;
-      if (addr.getOffset() == 0) {
-        bytes_copied = (guest_ptr + RubyConfig::dataBlockBytes() > paddr + len)?
-          (paddr + len - guest_ptr):
-          RubyConfig::dataBlockBytes();
-      } else {
-        bytes_copied = RubyConfig::dataBlockBytes() - addr.getOffset();
-        if (guest_ptr + bytes_copied > paddr + len)
-          bytes_copied = paddr + len - guest_ptr;
-      }
-
-      // first we need to find all data blocks that have to be updated for a write
-      // and the highest block for a read
-     for(int i=0;i<RubyConfig::numberOfProcessors();i++) {
-        if (Protocol::m_TwoLevelCache){
-          if(m_chip_ptr->m_L1Cache_L1IcacheMemory_vec[i]->isTagPresent(line_address(addr)))
-            datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_L1IcacheMemory_vec[i]->lookup(line_addr).getDataBlk());
-          if(m_chip_ptr->m_L1Cache_L1DcacheMemory_vec[i]->isTagPresent(line_address(addr)))
-            datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_L1DcacheMemory_vec[i]->lookup(line_addr).getDataBlk());
-        } else {
-          if(m_chip_ptr->m_L1Cache_cacheMemory_vec[i]->isTagPresent(line_address(addr)))
-            datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_cacheMemory_vec[i]->lookup(line_addr).getDataBlk());
-        }
-      }
-      if (Protocol::m_TwoLevelCache){
-        int l2_bank = map_L2ChipId_to_L2Cache(addr, 0).num; // TODO: ONLY WORKS WITH CMP!!!
-        if (m_chip_ptr->m_L2Cache_L2cacheMemory_vec[l2_bank]->isTagPresent(line_address(Address(paddr)))) {
-          datablocks.insertAtBottom(&m_chip_ptr->m_L2Cache_L2cacheMemory_vec[l2_bank]->lookup(addr).getDataBlk());
-        }
-      }
-      assert(dynamic_cast<Chip*>(m_chip_ptr)->m_Directory_directory_vec.size() > map_Address_to_DirectoryNode(addr));
-      DirectoryMemory* dir = dynamic_cast<Chip*>(m_chip_ptr)->m_Directory_directory_vec[map_Address_to_DirectoryNode(addr)];
-      Directory_Entry& entry = dir->lookup(line_addr);
-      datablocks.insertAtBottom(&entry.getDataBlk());
-
-      if (pkt->isRead()){
-        datablocks[0]->copyData(pkt_data, addr.getOffset(), bytes_copied);
-      } else {// pkt->isWrite() {
-        for (int i=0;i<datablocks.size();i++)
-          datablocks[i]->setData(pkt_data, addr.getOffset(), bytes_copied);
-      }
-
-      guest_ptr += bytes_copied;
-      pkt_data += bytes_copied;
-      datablocks.clear();
-    }
-}
-
-*/
diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh
index 254f5a092..9b55e9781 100644
--- a/src/mem/ruby/system/Sequencer.hh
+++ b/src/mem/ruby/system/Sequencer.hh
@@ -38,7 +38,6 @@
 #define SEQUENCER_H
 
 #include "mem/ruby/common/Global.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/common/Consumer.hh"
 #include "mem/protocol/CacheRequestType.hh"
 #include "mem/protocol/AccessModeType.hh"
diff --git a/src/mem/ruby/system/System.cc b/src/mem/ruby/system/System.cc
index e922d0bbf..fce456607 100644
--- a/src/mem/ruby/system/System.cc
+++ b/src/mem/ruby/system/System.cc
@@ -278,16 +278,7 @@ RubySystem::RubySystem(const vector <RubyObjConf> & sys_conf)
 
 RubySystem::~RubySystem()
 {
-  /*
-  for (int i=0; i < MachineType_base_level(MachineType_NUM); i++) {
-    for (int j=0; j < RubyConfig::getNumberOfControllersPerType(i); j++ ) {
-      delete m_controllers[i][j];
-    }
-  }
-  delete m_network_ptr;
-  delete m_profiler_ptr;
-  delete m_tracer_ptr;
-  */
+
 }
 
 void RubySystem::printSystemConfig(ostream & out)
@@ -307,8 +298,6 @@ void RubySystem::printSystemConfig(ostream & out)
 void RubySystem::printConfig(ostream& out)
 {
   out << "\n================ Begin RubySystem Configuration Print ================\n\n";
-  //  RubyConfig::printConfiguration(out);
-  //  out << endl;
   printSystemConfig(out);
   for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
        it != m_controllers.end(); it++) {
@@ -367,19 +356,7 @@ void RubySystem::clearStats() const
 
 void RubySystem::recordCacheContents(CacheRecorder& tr) const
 {
-  /*
-    for (int i = 0; i < m_chip_vector.size(); i++) {
-    for (int m_version = 0; m_version < RubyConfig::numberOfProcsPerChip(); m_version++) {
-      if (Protocol::m_TwoLevelCache) {
-        m_chip_vector[i]->m_L1Cache_L1IcacheMemory_vec[m_version]->setAsInstructionCache(true);
-        m_chip_vector[i]->m_L1Cache_L1DcacheMemory_vec[m_version]->setAsInstructionCache(false);
-      } else {
-        m_chip_vector[i]->m_L1Cache_cacheMemory_vec[m_version]->setAsInstructionCache(false);
-      }
-    }
-    m_chip_vector[i]->recordCacheContents(tr);
-  }
-  */
+
 }
 
 #ifdef CHECK_COHERENCE
diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh
index 8cbeb2b0e..dbf4dbc78 100644
--- a/src/mem/ruby/system/System.hh
+++ b/src/mem/ruby/system/System.hh
@@ -61,6 +61,20 @@ class DirectoryMemory;
 class Topology;
 class MemoryControl;
 
+/*
+ * This defines the number of longs (32-bits on 32 bit machines,
+ * 64-bit on 64-bit AMD machines) to use to hold the set...
+ * the default is 4, allowing 128 or 256 different members
+ * of the set.
+ *
+ * This should never need to be changed for correctness reasons,
+ * though increasing it will increase performance for larger
+ * set sizes at the cost of a (much) larger memory footprint
+ *
+ */
+const int NUMBER_WORDS_PER_SET = 4;
+
+
 struct RubyObjConf {
   string type;
   string name;
diff --git a/src/mem/ruby/tester/RaceyPseudoThread.cc b/src/mem/ruby/tester/RaceyPseudoThread.cc
index c681c0a7e..7d23b7286 100644
--- a/src/mem/ruby/tester/RaceyPseudoThread.cc
+++ b/src/mem/ruby/tester/RaceyPseudoThread.cc
@@ -21,7 +21,6 @@
  */
 
 #include "mem/ruby/tester/RaceyPseudoThread.hh"
-#include "mem/ruby/config/RubyConfig.hh"
 #include "mem/ruby/tester/RaceyDriver.hh"
 #include "gzstream.hh"