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author | Derek Hower <drh5@cs.wisc.edu> | 2009-09-10 13:32:16 -0500 |
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committer | Derek Hower <drh5@cs.wisc.edu> | 2009-09-10 13:32:16 -0500 |
commit | e6e3ccf5c0f49342116eadd6386a4d169b8a6581 (patch) | |
tree | 36e901a21630bb33b5270d8f5939f7443a64446b /src/mem/ruby | |
parent | 3bb2fcfc8438d77efbab542cd93f4a9f09478da6 (diff) | |
download | gem5-e6e3ccf5c0f49342116eadd6386a4d169b8a6581.tar.xz |
ruby: made L2 request/response latency based on cache latency by default
Diffstat (limited to 'src/mem/ruby')
-rw-r--r-- | src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb | 2 | ||||
-rw-r--r-- | src/mem/ruby/config/defaults.rb | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb index 2c59a0916..aa176d0f1 100644 --- a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb +++ b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb @@ -79,6 +79,8 @@ num_l2_banks.times { |n| net_ports << MOESI_CMP_directory_L2CacheController.new("L2CacheController_"+n.to_s, "L2Cache", cache) + net_ports.last.request_latency = l2_cache_latency + 2 + net_ports.last.response_latency = l2_cache_latency + 2 end } num_memories.times { |n| diff --git a/src/mem/ruby/config/defaults.rb b/src/mem/ruby/config/defaults.rb index 384abd119..a286b01fb 100644 --- a/src/mem/ruby/config/defaults.rb +++ b/src/mem/ruby/config/defaults.rb @@ -163,8 +163,8 @@ class MOESI_CMP_directory_DirectoryController < DirectoryController end class MOESI_CMP_directory_DMAController < DMAController - default_param :request_latency, Integer, 6 - default_param :response_latency, Integer, 6 + default_param :request_latency, Integer, 14 + default_param :response_latency, Integer, 14 end class RubySystem |