diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-08-03 18:25:30 -0500 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-08-03 18:25:30 -0500 |
commit | 720c0be620bd3427b5222e437fc7a82cb3a9ad7f (patch) | |
tree | 8bb28460993cea2b4d33d704fe77d18e491ac4a1 /src/mem/ruby | |
parent | 6230668f5e7e4d7298d039a99d3bd73d9064bea9 (diff) | |
download | gem5-720c0be620bd3427b5222e437fc7a82cb3a9ad7f.tar.xz |
Ruby: Remove files and includes not in use
Diffstat (limited to 'src/mem/ruby')
-rw-r--r-- | src/mem/ruby/common/Address.hh | 1 | ||||
-rw-r--r-- | src/mem/ruby/common/NetDest.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/Topology.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/PerfectSwitch.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/SimpleNetwork.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Switch.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/network/simple/Throttle.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/profiler/Profiler.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/AbstractEntry.hh | 1 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc | 30 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh | 1 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc | 12 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh | 5 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_Util.hh | 8 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/SConscript | 1 | ||||
-rw-r--r-- | src/mem/ruby/system/DirectoryMemory.cc | 28 | ||||
-rw-r--r-- | src/mem/ruby/system/Sequencer.cc | 1 | ||||
-rw-r--r-- | src/mem/ruby/system/System.hh | 2 |
18 files changed, 0 insertions, 97 deletions
diff --git a/src/mem/ruby/common/Address.hh b/src/mem/ruby/common/Address.hh index 38fc047e1..4a9a3adb2 100644 --- a/src/mem/ruby/common/Address.hh +++ b/src/mem/ruby/common/Address.hh @@ -34,7 +34,6 @@ #include "base/hashmap.hh" #include "mem/ruby/common/Global.hh" -#include "mem/ruby/system/MachineID.hh" #include "mem/ruby/system/NodeID.hh" const int ADDRESS_WIDTH = 64; // address width in bytes diff --git a/src/mem/ruby/common/NetDest.cc b/src/mem/ruby/common/NetDest.cc index 12eaa0321..82c60f415 100644 --- a/src/mem/ruby/common/NetDest.cc +++ b/src/mem/ruby/common/NetDest.cc @@ -26,7 +26,6 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "mem/protocol/Protocol.hh" #include "mem/ruby/common/NetDest.hh" NetDest::NetDest() diff --git a/src/mem/ruby/network/Topology.cc b/src/mem/ruby/network/Topology.cc index 58af3811f..a342d6d02 100644 --- a/src/mem/ruby/network/Topology.cc +++ b/src/mem/ruby/network/Topology.cc @@ -30,7 +30,6 @@ #include "debug/RubyNetwork.hh" #include "mem/protocol/MachineType.hh" -#include "mem/protocol/Protocol.hh" #include "mem/protocol/TopologyType.hh" #include "mem/ruby/common/NetDest.hh" #include "mem/ruby/network/BasicLink.hh" diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc index 3c35be217..06c4ace91 100644 --- a/src/mem/ruby/network/simple/PerfectSwitch.cc +++ b/src/mem/ruby/network/simple/PerfectSwitch.cc @@ -29,7 +29,6 @@ #include <algorithm> #include "debug/RubyNetwork.hh" -#include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/network/simple/PerfectSwitch.hh" #include "mem/ruby/network/simple/SimpleNetwork.hh" diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc index 0f3472773..a1066f2ad 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.cc +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc @@ -31,7 +31,6 @@ #include "base/stl_helpers.hh" #include "mem/protocol/MachineType.hh" -#include "mem/protocol/Protocol.hh" #include "mem/protocol/TopologyType.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/common/NetDest.hh" diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc index bcc1347a3..a678a657d 100644 --- a/src/mem/ruby/network/simple/Switch.cc +++ b/src/mem/ruby/network/simple/Switch.cc @@ -30,7 +30,6 @@ #include "base/stl_helpers.hh" #include "mem/protocol/MessageSizeType.hh" -#include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/network/simple/PerfectSwitch.hh" #include "mem/ruby/network/simple/SimpleNetwork.hh" diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc index 108dd843d..822989204 100644 --- a/src/mem/ruby/network/simple/Throttle.cc +++ b/src/mem/ruby/network/simple/Throttle.cc @@ -30,7 +30,6 @@ #include "base/cprintf.hh" #include "debug/RubyNetwork.hh" -#include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/network/simple/Throttle.hh" #include "mem/ruby/network/Network.hh" diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc index 08a4439db..04e44bc13 100644 --- a/src/mem/ruby/profiler/Profiler.cc +++ b/src/mem/ruby/profiler/Profiler.cc @@ -52,7 +52,6 @@ #include "base/stl_helpers.hh" #include "base/str.hh" #include "mem/protocol/MachineType.hh" -#include "mem/protocol/Protocol.hh" #include "mem/protocol/RubyRequest.hh" #include "mem/ruby/network/Network.hh" #include "mem/ruby/profiler/AddressProfiler.hh" diff --git a/src/mem/ruby/slicc_interface/AbstractEntry.hh b/src/mem/ruby/slicc_interface/AbstractEntry.hh index 7076d2e4c..fb1af2ea0 100644 --- a/src/mem/ruby/slicc_interface/AbstractEntry.hh +++ b/src/mem/ruby/slicc_interface/AbstractEntry.hh @@ -66,4 +66,3 @@ operator<<(std::ostream& out, const AbstractEntry& obj) } #endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTENTRY_HH__ - diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc deleted file mode 100644 index 06c036a10..000000000 --- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.cc +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh" -#include "mem/ruby/system/CacheMemory.hh" diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh index 2b7eb8b3b..18e7ad6fc 100644 --- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh +++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh @@ -34,7 +34,6 @@ #include "mem/ruby/common/Address.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/common/NetDest.hh" -#include "mem/ruby/common/Set.hh" #include "mem/ruby/system/DirectoryMemory.hh" #include "mem/ruby/system/MachineID.hh" #include "mem/ruby/system/NodeID.hh" diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc index 2385b1cbc..508c27794 100644 --- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc +++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc @@ -26,7 +26,6 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "mem/protocol/Protocol.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/profiler/AddressProfiler.hh" #include "mem/ruby/profiler/Profiler.hh" @@ -37,17 +36,6 @@ using namespace std; void -profile_request(int cache_state, Directory_State directory_state, - GenericRequestType request_type) -{ - string requestStr = L1Cache_State_to_string(L1Cache_State(cache_state))+ - ":" + - Directory_State_to_string(directory_state) + ":" + - GenericRequestType_to_string(request_type); - g_system_ptr->getProfiler()->profileRequest(requestStr); -} - -void profile_request(const string& L1CacheState, const string& L2CacheState, const string& directoryState, const string& requestType) { diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh index f23e15c91..b2e612bd4 100644 --- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh +++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh @@ -36,9 +36,6 @@ #include <string> #include "mem/protocol/AccessType.hh" -#include "mem/protocol/Directory_State.hh" -#include "mem/protocol/GenericRequestType.hh" -#include "mem/protocol/L1Cache_State.hh" #include "mem/ruby/common/Address.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/profiler/Profiler.hh" @@ -46,8 +43,6 @@ class Set; -void profile_request(int cache_state, Directory_State directory_state, - GenericRequestType request_type); void profile_outstanding_persistent_request(int outstanding); void profile_outstanding_request(int outstanding); void profile_sharing(const Address& addr, AccessType type, NodeID requestor, diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh index 058a51bae..9b284dab4 100644 --- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh +++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh @@ -36,9 +36,7 @@ #include <cassert> #include "mem/protocol/AccessType.hh" -#include "mem/protocol/Directory_State.hh" #include "mem/protocol/GenericRequestType.hh" -#include "mem/protocol/L1Cache_State.hh" #include "mem/protocol/MachineType.hh" #include "mem/protocol/MessageSizeType.hh" #include "mem/protocol/PrefetchBit.hh" @@ -69,12 +67,6 @@ multicast_retry() } } -inline int -cache_state_to_int(L1Cache_State state) -{ - return state; -} - inline Time get_time() { diff --git a/src/mem/ruby/slicc_interface/SConscript b/src/mem/ruby/slicc_interface/SConscript index 9d4e6fe3b..0fbdc1789 100644 --- a/src/mem/ruby/slicc_interface/SConscript +++ b/src/mem/ruby/slicc_interface/SConscript @@ -40,4 +40,3 @@ Source('AbstractEntry.cc') Source('AbstractCacheEntry.cc') Source('RubyRequest.cc') Source('RubySlicc_Profiler_interface.cc') -Source('RubySlicc_ComponentMapping.cc') diff --git a/src/mem/ruby/system/DirectoryMemory.cc b/src/mem/ruby/system/DirectoryMemory.cc index c461ce09b..a91f05a69 100644 --- a/src/mem/ruby/system/DirectoryMemory.cc +++ b/src/mem/ruby/system/DirectoryMemory.cc @@ -184,34 +184,6 @@ DirectoryMemory::lookup(PhysAddress address) return *entry; } -#if 0 -Directory_Entry& -DirectoryMemory::lookup(PhysAddress address) -{ - assert(isPresent(address)); - Index index = address.memoryModuleIndex(); - - if (index < 0 || index > m_size) { - WARN_EXPR(address.getAddress()); - WARN_EXPR(index); - WARN_EXPR(m_size); - ERROR_MSG("Directory Memory Assertion: accessing memory out of range"); - } - Directory_Entry* entry = m_entries[index]; - - // allocate the directory entry on demand. - if (entry == NULL) { - entry = new Directory_Entry; - entry->getDataBlk().assign(m_ram->getBlockPtr(address)); - - // store entry to the table - m_entries[index] = entry; - } - - return *entry; -} -#endif - void DirectoryMemory::invalidateBlock(PhysAddress address) { diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 1b46e680d..dcee57146 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -31,7 +31,6 @@ #include "cpu/testers/rubytest/RubyTester.hh" #include "debug/MemoryAccess.hh" #include "debug/ProtocolTrace.hh" -#include "mem/protocol/Protocol.hh" #include "mem/ruby/buffers/MessageBuffer.hh" #include "mem/ruby/common/Global.hh" #include "mem/ruby/common/SubBlock.hh" diff --git a/src/mem/ruby/system/System.hh b/src/mem/ruby/system/System.hh index 88a0186c5..15abf1c0f 100644 --- a/src/mem/ruby/system/System.hh +++ b/src/mem/ruby/system/System.hh @@ -44,7 +44,6 @@ #include "sim/sim_object.hh" class AbstractController; -class AbstractMemory; class CacheRecorder; class MemoryVector; class Network; @@ -134,7 +133,6 @@ class RubySystem : public SimObject void registerNetwork(Network*); void registerProfiler(Profiler*); void registerTracer(Tracer*); - void registerAbstractMemory(AbstractMemory*); void registerAbstractController(AbstractController*); private: |