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authorGabe Black <gabeblack@google.com>2019-05-02 15:33:32 -0700
committerGabe Black <gabeblack@google.com>2019-05-18 10:20:20 +0000
commit972c38b1cc5f6f6c649a0e9923695447bc5d6255 (patch)
treeba3ca960ad12e37c38d8d17ff53b267fd5511688 /src/mem/ruby
parente2656006df442a995bf80ee03fa9700d6ec14537 (diff)
downloadgem5-972c38b1cc5f6f6c649a0e9923695447bc5d6255.tar.xz
arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.
This code will be preserved through version control, but otherwise creates clutter and will rot in place since it's never compiled. Change-Id: Id265f6deac445116843956ea5cf1210d8127274e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18608 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Jason Lowe-Power <jason@lowepower.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/mem/ruby')
-rw-r--r--src/mem/ruby/system/GPUCoalescer.cc3
-rw-r--r--src/mem/ruby/system/RubySystem.cc52
-rw-r--r--src/mem/ruby/system/Sequencer.cc3
3 files changed, 0 insertions, 58 deletions
diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc
index 5f8725249..61ee2ae28 100644
--- a/src/mem/ruby/system/GPUCoalescer.cc
+++ b/src/mem/ruby/system/GPUCoalescer.cc
@@ -984,9 +984,6 @@ GPUCoalescer::print(ostream& out) const
void
GPUCoalescer::checkCoherence(Addr addr)
{
-#ifdef CHECK_COHERENCE
- m_ruby_system->checkGlobalCoherenceInvariant(addr);
-#endif
}
void
diff --git a/src/mem/ruby/system/RubySystem.cc b/src/mem/ruby/system/RubySystem.cc
index 3d0470ca3..572f5fe07 100644
--- a/src/mem/ruby/system/RubySystem.cc
+++ b/src/mem/ruby/system/RubySystem.cc
@@ -508,58 +508,6 @@ RubySystem::functionalWrite(PacketPtr pkt)
return true;
}
-#ifdef CHECK_COHERENCE
-// This code will check for cases if the given cache block is exclusive in
-// one node and shared in another-- a coherence violation
-//
-// To use, the SLICC specification must call sequencer.checkCoherence(address)
-// when the controller changes to a state with new permissions. Do this
-// in setState. The SLICC spec must also define methods "isBlockShared"
-// and "isBlockExclusive" that are specific to that protocol
-//
-void
-RubySystem::checkGlobalCoherenceInvariant(const Address& addr)
-{
-#if 0
- NodeID exclusive = -1;
- bool sharedDetected = false;
- NodeID lastShared = -1;
-
- for (int i = 0; i < m_chip_vector.size(); i++) {
- if (m_chip_vector[i]->isBlockExclusive(addr)) {
- if (exclusive != -1) {
- // coherence violation
- WARN_EXPR(exclusive);
- WARN_EXPR(m_chip_vector[i]->getID());
- WARN_EXPR(addr);
- WARN_EXPR(getTime());
- ERROR_MSG("Coherence Violation Detected -- 2 exclusive chips");
- } else if (sharedDetected) {
- WARN_EXPR(lastShared);
- WARN_EXPR(m_chip_vector[i]->getID());
- WARN_EXPR(addr);
- WARN_EXPR(getTime());
- ERROR_MSG("Coherence Violation Detected -- exclusive chip with >=1 shared");
- } else {
- exclusive = m_chip_vector[i]->getID();
- }
- } else if (m_chip_vector[i]->isBlockShared(addr)) {
- sharedDetected = true;
- lastShared = m_chip_vector[i]->getID();
-
- if (exclusive != -1) {
- WARN_EXPR(lastShared);
- WARN_EXPR(exclusive);
- WARN_EXPR(addr);
- WARN_EXPR(getTime());
- ERROR_MSG("Coherence Violation Detected -- exclusive chip with >=1 shared");
- }
- }
- }
-#endif
-}
-#endif
-
RubySystem *
RubySystemParams::create()
{
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index a282995da..ba67311c7 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -685,9 +685,6 @@ Sequencer::print(ostream& out) const
void
Sequencer::checkCoherence(Addr addr)
{
-#ifdef CHECK_COHERENCE
- m_ruby_system->checkGlobalCoherenceInvariant(addr);
-#endif
}
void