mem: Add support for multi-channel DRAM configurations

This patch adds support for multi-channel instances of the DRAM
controller model by stripping away the channel bits in the address
decoding. The patch relies on the availiability of address
interleaving and, at this time, it is up to the user to configure the
interleaving appropriately. At the moment it is assumed that the
channel interleaving bits are immediately following the column bits
(smallest sensible interleaving). Convenience methods for building
multi-channel configurations will be added later.

1 files changed, 1 insertions, 0 deletions

diff --git a/src/mem/simple_dram.hh b/src/mem/simple_dram.hh
index d8f51a745..1f6e1a837 100644
--- a/src/mem/simple_dram.hh
+++ b/src/mem/simple_dram.hh
@@ -378,6 +378,7 @@ class SimpleDRAM : public AbstractMemory
     const uint32_t linesPerRowBuffer;
     const uint32_t ranksPerChannel;
     const uint32_t banksPerRank;
+    const uint32_t channels;
     uint32_t rowsPerBank;
     const uint32_t readBufferSize;
     const uint32_t writeBufferSize;