mem: Fixes for DRAM stats accounting

This patch fixes a number of stats accounting issues in the DRAM
controller. Most importantly, it separates the system interface and
DRAM interface so that it is clearer what the actual DRAM bandwidth
(and consequently utilisation) is.

1 files changed, 7 insertions, 6 deletions

diff --git a/src/mem/simple_dram.hh b/src/mem/simple_dram.hh
index 175c415d6..0731b14bb 100644
--- a/src/mem/simple_dram.hh
+++ b/src/mem/simple_dram.hh
@@ -547,12 +547,13 @@ class SimpleDRAM : public AbstractMemory
     Stats::Scalar bytesReadDRAM;
     Stats::Scalar bytesReadWrQ;
     Stats::Scalar bytesWritten;
-    Stats::Scalar bytesConsumedRd;
-    Stats::Scalar bytesConsumedWr;
+    Stats::Scalar bytesReadSys;
+    Stats::Scalar bytesWrittenSys;
     Stats::Scalar servicedByWrQ;
+    Stats::Scalar mergedWrBursts;
     Stats::Scalar neitherReadNorWrite;
-    Stats::Vector perBankRdReqs;
-    Stats::Vector perBankWrReqs;
+    Stats::Vector perBankRdBursts;
+    Stats::Vector perBankWrBursts;
     Stats::Scalar numRdRetry;
     Stats::Scalar numWrRetry;
     Stats::Scalar totGap;
@@ -577,8 +578,8 @@ class SimpleDRAM : public AbstractMemory
     // Average bandwidth
     Stats::Formula avgRdBW;
     Stats::Formula avgWrBW;
-    Stats::Formula avgConsumedRdBW;
-    Stats::Formula avgConsumedWrBW;
+    Stats::Formula avgRdBWSys;
+    Stats::Formula avgWrBWSys;
     Stats::Formula peakBW;
     Stats::Formula busUtil;
     Stats::Formula busUtilRead;