mem: Make tXAW enforcement less conservative and per rank

This patch changes the tXAW constraint so that it is enforced per rank
rather than globally for all ranks in the channel. It also avoids
using the bank freeAt to enforce the activation limit, as doing so
also precludes performing any column or row command to the
DRAM. Instead the patch introduces a new variable actAllowedAt for the
banks and use this to track when a potential activation can occur.

1 files changed, 5 insertions, 3 deletions

diff --git a/src/mem/simple_dram.hh b/src/mem/simple_dram.hh
index 19d23efba..c97f70e1d 100644
--- a/src/mem/simple_dram.hh
+++ b/src/mem/simple_dram.hh
@@ -134,7 +134,7 @@ class SimpleDRAM : public AbstractMemory
     bool stopReads;
 
     /** List to keep track of activate ticks */
-    std::deque<Tick> actTicks;
+    std::vector<std::deque<Tick>> actTicks;
 
     /**
      * A basic class to track the bank state indirectly via times
@@ -153,11 +153,13 @@ class SimpleDRAM : public AbstractMemory
 
         Tick freeAt;
         Tick tRASDoneAt;
+        Tick actAllowedAt;
 
         uint32_t bytesAccessed;
 
         Bank() :
-            openRow(INVALID_ROW), freeAt(0), tRASDoneAt(0), bytesAccessed(0)
+            openRow(INVALID_ROW), freeAt(0), tRASDoneAt(0), actAllowedAt(0),
+            bytesAccessed(0)
         { }
     };
 
@@ -418,7 +420,7 @@ class SimpleDRAM : public AbstractMemory
      * method updates the time that the banks become available based
      * on the current limits.
      */
-    void recordActivate(Tick act_tick);
+    void recordActivate(Tick act_tick, uint8_t rank);
 
     void printParams() const;
     void printQs() const;