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| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-02-19 05:56:06 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-02-19 05:56:06 -0500 |
| commit | 860155a5fc48f983e9af40c19bf8db8250709c26 (patch) | |
| tree | 18c5c3ccb573182ba8444fae02c2c84f2bb4a3c5 /src/mem/simple_mem.cc | |
| parent | 40d0e6c899d5da400c9647496532a8fb1ef64b7b (diff) | |
| download | gem5-860155a5fc48f983e9af40c19bf8db8250709c26.tar.xz | |
mem: Enforce strict use of busFirst- and busLastWordTime
This patch adds a check to ensure that the delay incurred by
the bus is not simply disregarded, but accounted for by someone. At
this point, all the modules do is to zero it out, and no additional
time is spent. This highlights where the bus timing is simply dropped
instead of being paid for.
As a follow up, the locations identified in this patch should add this
additional time to the packets in one way or another. For now it
simply acts as a sanity check and highlights where the delay is simply
ignored.
Since no time is added, all regressions remain the same.
Diffstat (limited to 'src/mem/simple_mem.cc')
| -rw-r--r-- | src/mem/simple_mem.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc index 7dd0fd101..3492360cd 100644 --- a/src/mem/simple_mem.cc +++ b/src/mem/simple_mem.cc @@ -121,6 +121,9 @@ SimpleMemory::recvTimingReq(PacketPtr pkt) return false; } + // @todo someone should pay for this + pkt->busFirstWordDelay = pkt->busLastWordDelay = 0; + // update the release time according to the bandwidth limit, and // do so with respect to the time it takes to finish this request // rather than long term as it is the short term data rate that is |