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| author | Djordje Kovacevic <djordje.kovacevic@arm.com> | 2012-09-25 11:49:41 -0500 |
|---|---|---|
| committer | Djordje Kovacevic <djordje.kovacevic@arm.com> | 2012-09-25 11:49:41 -0500 |
| commit | 80a26a3e39874dab7c0b51cd5ce0258039494e30 (patch) | |
| tree | 220868cc2d24070052510a648feb85d9898599ea /src/mem/simple_mem.hh | |
| parent | 6fc0094337bc0356c55232c3850fb5fd2dab1f0c (diff) | |
| download | gem5-80a26a3e39874dab7c0b51cd5ce0258039494e30.tar.xz | |
MEM: Put memory system document into doxygen
Diffstat (limited to 'src/mem/simple_mem.hh')
| -rw-r--r-- | src/mem/simple_mem.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/simple_mem.hh b/src/mem/simple_mem.hh index 4f7af864b..f201709c2 100644 --- a/src/mem/simple_mem.hh +++ b/src/mem/simple_mem.hh @@ -58,6 +58,7 @@ * an configurable throughput and latency, potentially with a variance * added to the latter. It uses a QueueSlavePort to avoid dealing with * the flow control of sending responses. + * @sa \ref gem5MemorySystem "gem5 Memory System" */ class SimpleMemory : public AbstractMemory { |