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author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:14 -0700 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-08-20 11:46:14 -0700 |
commit | e7f2da517adbc9ba4ed1b33de102126260a0d587 (patch) | |
tree | dc45a1acf1843da774f55fb1a5e27333804c4910 /src/mem/slicc/ast/OutPortDeclAST.py | |
parent | af6b97e3ee2d73fcb2d4bcdbdffc9a6534dfdac8 (diff) | |
download | gem5-e7f2da517adbc9ba4ed1b33de102126260a0d587.tar.xz |
ruby: Stall and wait input messages instead of recycling
This patch allows messages to be stalled in their input buffers and wait
until a corresponding address changes state. In order to make this work,
all in_ports must be ranked in order of dependence and those in_ports that
may unblock an address, must wake up the stalled messages. Alot of this
complexity is handled in slicc and the specification files simply
annotate the in_ports.
--HG--
rename : src/mem/slicc/ast/CheckAllocateStatementAST.py => src/mem/slicc/ast/StallAndWaitStatementAST.py
rename : src/mem/slicc/ast/CheckAllocateStatementAST.py => src/mem/slicc/ast/WakeUpDependentsStatementAST.py
Diffstat (limited to 'src/mem/slicc/ast/OutPortDeclAST.py')
0 files changed, 0 insertions, 0 deletions