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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:18 -0800 |
| commit | dc8018a5c3482008232e6faaa2d96cf20aed7485 (patch) | |
| tree | a972ac4544e227397595baf6eeb30e1854f480fc /src/mem/slicc/ast/StallAndWaitStatementAST.py | |
| parent | c8c82f09a282832d919f7eb073a47be838e65b29 (diff) | |
| download | gem5-dc8018a5c3482008232e6faaa2d96cf20aed7485.tar.xz | |
style: remove trailing whitespace
Result of running 'hg m5style --skip-all --fix-white -a'.
Diffstat (limited to 'src/mem/slicc/ast/StallAndWaitStatementAST.py')
| -rw-r--r-- | src/mem/slicc/ast/StallAndWaitStatementAST.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/slicc/ast/StallAndWaitStatementAST.py b/src/mem/slicc/ast/StallAndWaitStatementAST.py index 6ab2888b7..ad261e26f 100644 --- a/src/mem/slicc/ast/StallAndWaitStatementAST.py +++ b/src/mem/slicc/ast/StallAndWaitStatementAST.py @@ -33,7 +33,7 @@ class StallAndWaitStatementAST(StatementAST): super(StatementAST, self).__init__(slicc) self.in_port = in_port self.address = address - + def __repr__(self): return "[StallAndWaitStatementAst: %r]" % self.in_port |