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authorBrad Beckmann <Brad.Beckmann@amd.com>2011-02-06 22:14:19 -0800
committerBrad Beckmann <Brad.Beckmann@amd.com>2011-02-06 22:14:19 -0800
commitf5aa75fdc528aca122ac1369fa4ac3df8a915027 (patch)
tree8d822208be668299b8fca4c60852fd7725039c92 /src/mem/slicc/ast
parent194a137498e84ea9571a0112dc1374e5b833deaf (diff)
downloadgem5-f5aa75fdc528aca122ac1369fa4ac3df8a915027.tar.xz
ruby: support to stallAndWait the mandatory queue
By stalling and waiting the mandatory queue instead of recycling it, one can ensure that no incoming messages are starved when the mandatory queue puts signficant of pressure on the L1 cache controller (i.e. the ruby memtester). --HG-- rename : src/mem/slicc/ast/WakeUpDependentsStatementAST.py => src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
Diffstat (limited to 'src/mem/slicc/ast')
-rw-r--r--src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py43
-rw-r--r--src/mem/slicc/ast/__init__.py1
2 files changed, 44 insertions, 0 deletions
diff --git a/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py b/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
new file mode 100644
index 000000000..cd453bdc3
--- /dev/null
+++ b/src/mem/slicc/ast/WakeUpAllDependentsStatementAST.py
@@ -0,0 +1,43 @@
+# Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
+# Copyright (c) 2009 The Hewlett-Packard Development Company
+# Copyright (c) 2010 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from slicc.ast.StatementAST import StatementAST
+
+class WakeUpAllDependentsStatementAST(StatementAST):
+ def __init__(self, slicc):
+ super(StatementAST, self).__init__(slicc)
+
+ def __repr__(self):
+ return "[WakeUpAllDependentsStatementAst: %r]" % self.variable
+
+ def generate(self, code, return_type):
+ code('''
+ if (m_waiting_buffers.size() > 0) {
+ wakeUpAllBuffers();
+ }
+ ''')
diff --git a/src/mem/slicc/ast/__init__.py b/src/mem/slicc/ast/__init__.py
index ae797ecd3..4af6c2036 100644
--- a/src/mem/slicc/ast/__init__.py
+++ b/src/mem/slicc/ast/__init__.py
@@ -72,4 +72,5 @@ from slicc.ast.TypeFieldEnumAST import *
from slicc.ast.TypeFieldMemberAST import *
from slicc.ast.TypeFieldMethodAST import *
from slicc.ast.VarExprAST import *
+from slicc.ast.WakeUpAllDependentsStatementAST import *
from slicc.ast.WakeUpDependentsStatementAST import *