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author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-09-01 16:55:45 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-09-01 16:55:45 -0500 |
commit | cee8faaad066cda6710904b5190e7287ff9356af (patch) | |
tree | 26e2e80ef32a9d82cd6f740d39d15aa229620e5a /src/mem/slicc/symbols | |
parent | b1d3873ec52692b0442666718da4175379697bb2 (diff) | |
download | gem5-cee8faaad066cda6710904b5190e7287ff9356af.tar.xz |
ruby: slicc: change the way configurable members are specified
There are two changes this patch makes to the way configurable members of a
state machine are specified in SLICC. The first change is that the data
member declarations will need to be separated by a semi-colon instead of a
comma. Secondly, the default value to be assigned would now use SLICC's
assignment operator i.e. ':='.
Diffstat (limited to 'src/mem/slicc/symbols')
-rw-r--r-- | src/mem/slicc/symbols/StateMachine.py | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py index 2cda3a49d..71fcc053f 100644 --- a/src/mem/slicc/symbols/StateMachine.py +++ b/src/mem/slicc/symbols/StateMachine.py @@ -56,12 +56,14 @@ class StateMachine(Symbol): for param in config_parameters: if param.pointer: - var = Var(symtab, param.name, location, param.type_ast.type, - "(*m_%s_ptr)" % param.name, {}, self) + var = Var(symtab, param.ident, location, param.type_ast.type, + "(*m_%s_ptr)" % param.ident, {}, self) else: - var = Var(symtab, param.name, location, param.type_ast.type, - "m_%s" % param.name, {}, self) - self.symtab.registerSym(param.name, var) + var = Var(symtab, param.ident, location, param.type_ast.type, + "m_%s" % param.ident, {}, self) + + self.symtab.registerSym(param.ident, var) + if str(param.type_ast.type) == "Prefetcher": self.prefetchers.append(var) @@ -178,8 +180,10 @@ class StateMachine(Symbol): def printControllerPython(self, path): code = self.symtab.codeFormatter() ident = self.ident + py_ident = "%s_Controller" % ident c_ident = "%s_Controller" % self.ident + code(''' from m5.params import * from m5.SimObject import SimObject @@ -192,11 +196,14 @@ class $py_ident(RubyController): code.indent() for param in self.config_parameters: dflt_str = '' - if param.default is not None: - dflt_str = str(param.default) + ', ' + + if param.rvalue is not None: + dflt_str = str(param.rvalue.inline()) + ', ' + if python_class_map.has_key(param.type_ast.type.c_ident): python_type = python_class_map[param.type_ast.type.c_ident] - code('${{param.name}} = Param.${{python_type}}(${dflt_str}"")') + code('${{param.ident}} = Param.${{python_type}}(${dflt_str}"")') + else: self.error("Unknown c++ to python class conversion for c++ " \ "type: '%s'. Please update the python_class_map " \ @@ -480,11 +487,11 @@ $c_ident::$c_ident(const Params *p) # for param in self.config_parameters: if param.pointer: - code('m_${{param.name}}_ptr = p->${{param.name}};') + code('m_${{param.ident}}_ptr = p->${{param.ident}};') else: - code('m_${{param.name}} = p->${{param.name}};') - if re.compile("sequencer").search(param.name): - code('m_${{param.name}}_ptr->setController(this);') + code('m_${{param.ident}} = p->${{param.ident}};') + if re.compile("sequencer").search(param.ident): + code('m_${{param.ident}}_ptr->setController(this);') for var in self.objects: if var.ident.find("mandatoryQueue") >= 0: @@ -679,9 +686,9 @@ $vid->setDescription("[Version " + to_string(m_version) + ", ${ident}, name=${{v seq_ident = "NULL" for param in self.config_parameters: - if param.name == "sequencer": + if param.ident == "sequencer": assert(param.pointer) - seq_ident = "m_%s_ptr" % param.name + seq_ident = "m_%s_ptr" % param.ident code(''' |