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authorJoel Hestness <hestness@cs.utexas.edu>2012-07-10 22:51:54 -0700
committerJoel Hestness <hestness@cs.utexas.edu>2012-07-10 22:51:54 -0700
commit467093ebf238a1954e00576daf14a9f246b51e79 (patch)
tree1e3a355e93a62174b112e97e81f5d7aa62299016 /src/mem/slicc/symbols
parentc10f348120ae4a61c782815280673fba5ee71157 (diff)
downloadgem5-467093ebf238a1954e00576daf14a9f246b51e79.tar.xz
ruby: tag and data cache access support
Updates to Ruby to support statistics counting of cache accesses. This feature serves multiple purposes beyond simple stats collection. It provides the foundation for ruby to model the cache tag and data arrays as physical resources, as well as provide the necessary input data for McPAT power modeling.
Diffstat (limited to 'src/mem/slicc/symbols')
-rw-r--r--src/mem/slicc/symbols/RequestType.py33
-rw-r--r--src/mem/slicc/symbols/StateMachine.py20
-rw-r--r--src/mem/slicc/symbols/Transition.py3
-rw-r--r--src/mem/slicc/symbols/__init__.py1
4 files changed, 56 insertions, 1 deletions
diff --git a/src/mem/slicc/symbols/RequestType.py b/src/mem/slicc/symbols/RequestType.py
new file mode 100644
index 000000000..dd2f4aa88
--- /dev/null
+++ b/src/mem/slicc/symbols/RequestType.py
@@ -0,0 +1,33 @@
+# Copyright (c) 2010 Advanced Micro Devices, Inc.
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from slicc.symbols.Symbol import Symbol
+
+class RequestType(Symbol):
+ def __repr__(self):
+ return "[RequestType: %s]" % self.ident
+
+__all__ = [ "RequestType" ]
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 8f4676c42..230eb1b22 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -61,6 +61,7 @@ class StateMachine(Symbol):
self.states = orderdict()
self.events = orderdict()
self.actions = orderdict()
+ self.request_types = orderdict()
self.transitions = []
self.in_ports = []
self.functions = []
@@ -97,6 +98,10 @@ class StateMachine(Symbol):
self.actions[action.ident] = action
+ def addRequestType(self, request_type):
+ assert self.table is None
+ self.request_types[request_type.ident] = request_type
+
def addTransition(self, trans):
assert self.table is None
self.transitions.append(trans)
@@ -989,6 +994,10 @@ $c_ident::${{action.ident}}(const Address& addr)
code = self.symtab.codeFormatter()
ident = self.ident
+ outputRequest_types = True
+ if len(self.request_types) == 0:
+ outputRequest_types = False
+
code('''
// Auto generated C++ code started by $__file__:$__line__
// ${ident}: ${{self.short}}
@@ -1003,6 +1012,12 @@ $c_ident::${{action.ident}}(const Address& addr)
#include "mem/protocol/${ident}_Controller.hh"
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
+''')
+
+ if outputRequest_types:
+ code('''#include "mem/protocol/${ident}_RequestType.hh"''')
+
+ code('''
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/slicc_interface/RubySlicc_includes.hh"
@@ -1210,6 +1225,7 @@ ${ident}_Controller::doTransitionWorker(${ident}_Event event,
case('next_state = ${ident}_State_${ns_ident};')
actions = trans.actions
+ request_types = trans.request_types
# Check for resources
case_sorter = []
@@ -1229,6 +1245,10 @@ if (!%s.areNSlotsAvailable(%s))
for c in sorted(case_sorter):
case("$c")
+ # Record access types for this transition
+ for request_type in request_types:
+ case('recordRequestType(${ident}_RequestType_${{request_type.ident}}, addr);')
+
# Figure out if we stall
stall = False
for action in actions:
diff --git a/src/mem/slicc/symbols/Transition.py b/src/mem/slicc/symbols/Transition.py
index 1bf09048a..96bb0056c 100644
--- a/src/mem/slicc/symbols/Transition.py
+++ b/src/mem/slicc/symbols/Transition.py
@@ -29,7 +29,7 @@ from slicc.symbols.Symbol import Symbol
class Transition(Symbol):
def __init__(self, table, machine, state, event, nextState, actions,
- location, pairs):
+ request_types, location, pairs):
ident = "%s|%s" % (state, event)
super(Transition, self).__init__(table, ident, location, pairs)
@@ -37,6 +37,7 @@ class Transition(Symbol):
self.event = machine.events[event]
self.nextState = machine.states[nextState]
self.actions = [ machine.actions[a] for a in actions ]
+ self.request_types = [ machine.request_types[s] for s in request_types ]
self.resources = {}
for action in self.actions:
diff --git a/src/mem/slicc/symbols/__init__.py b/src/mem/slicc/symbols/__init__.py
index 43388a5fe..0f8dde3a2 100644
--- a/src/mem/slicc/symbols/__init__.py
+++ b/src/mem/slicc/symbols/__init__.py
@@ -30,6 +30,7 @@ from slicc.symbols.Action import Action
from slicc.symbols.Event import Event
from slicc.symbols.Func import Func
from slicc.symbols.State import State
+from slicc.symbols.RequestType import RequestType
from slicc.symbols.StateMachine import StateMachine
from slicc.symbols.Symbol import Symbol
from slicc.symbols.SymbolTable import SymbolTable