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authorNilay Vaish <nilay@cs.wisc.edu>2014-01-09 10:45:50 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2014-01-09 10:45:50 -0600
commit0387281e2a83fe34ddb23cc48a9f86fd60729d25 (patch)
treea16df2ced244ec2c28aa06032b6c9836bd001fc2 /src/mem/slicc
parent855908164845f19421c72a552c944efe7abcf933 (diff)
downloadgem5-0387281e2a83fe34ddb23cc48a9f86fd60729d25.tar.xz
ruby: fix bug introduced to revision 8523754f8885
Diffstat (limited to 'src/mem/slicc')
-rw-r--r--src/mem/slicc/symbols/StateMachine.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 1106dcadc..89bb5dc0a 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -298,7 +298,7 @@ TransitionResult doTransition(${ident}_Event event,
''')
code('''
- const Address& addr);
+ const Address addr);
TransitionResult doTransitionWorker(${ident}_Event event,
${ident}_State state,
@@ -1158,7 +1158,7 @@ ${ident}_Controller::doTransition(${ident}_Event event,
${{self.TBEType.c_ident}}* m_tbe_ptr,
''')
code('''
- const Address &addr)
+ const Address addr)
{
''')
if self.TBEType != None and self.EntryType != None: