Ports now have a pointer to the MemObject that owns it (can be NULL).

src/cpu/simple/atomic.hh:
    Port now takes in the MemObject that owns it.
src/cpu/simple/timing.hh:
    Port now takes in MemObject that owns it.
src/dev/io_device.cc:
src/mem/bus.hh:
    Ports now take in the MemObject that owns it.
src/mem/cache/base_cache.cc:
    Ports now take in the MemObject that own it.
src/mem/port.hh:
src/mem/tport.hh:
    Ports now optionally take in the MemObject that owns it.

--HG--
extra : convert_revision : 890a72a871795987c2236c65937e06973412d349

1 files changed, 2 insertions, 2 deletions

diff --git a/src/mem/tport.hh b/src/mem/tport.hh
index fbe81c443..b419b7c7f 100644
--- a/src/mem/tport.hh
+++ b/src/mem/tport.hh
@@ -117,8 +117,8 @@ class SimpleTimingPort : public Port
 
   public:
 
-    SimpleTimingPort(std::string pname)
-        : Port(pname), outTiming(0), drainEvent(NULL)
+    SimpleTimingPort(std::string pname, MemObject *_owner = NULL)
+        : Port(pname, _owner), outTiming(0), drainEvent(NULL)
     {}
 
     /** Hook for draining timing accesses from the system.  The