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authorGabe Black <gblack@eecs.umich.edu>2007-05-18 13:36:47 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-05-18 13:36:47 -0700
commita13d5af274a1847eaad649af226e643e86a3322d (patch)
tree6b3bdd0b269802b324b4744e6ed8362d1917e1a0 /src/mem/translating_port.cc
parent6a6e62014ec72f9dd29a42c3e92fbc91d6b1f648 (diff)
parenta8278c3bde2ba9abc2820afafa9d0e766e36b2c8 (diff)
downloadgem5-a13d5af274a1847eaad649af226e643e86a3322d.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into doughnut.mwconnections.com:/home/gblack/m5/newmem-x86 --HG-- extra : convert_revision : 3f17fc418ee5a30da2b08a515fb394cc8fcdd237
Diffstat (limited to 'src/mem/translating_port.cc')
-rw-r--r--src/mem/translating_port.cc17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc
index d2c854086..54de6625e 100644
--- a/src/mem/translating_port.cc
+++ b/src/mem/translating_port.cc
@@ -34,12 +34,14 @@
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "mem/page_table.hh"
+#include "sim/process.hh"
using namespace TheISA;
TranslatingPort::TranslatingPort(const std::string &_name,
- PageTable *p_table, bool alloc)
- : FunctionalPort(_name), pTable(p_table), allocating(alloc)
+ Process *p, AllocType alloc)
+ : FunctionalPort(_name), pTable(p->pTable), process(p),
+ allocating(alloc)
{ }
TranslatingPort::~TranslatingPort()
@@ -81,13 +83,18 @@ TranslatingPort::tryWriteBlob(Addr addr, uint8_t *p, int size)
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
if (!pTable->translate(gen.addr(), paddr)) {
- if (allocating) {
+ if (allocating == Always) {
pTable->allocate(roundDown(gen.addr(), VMPageSize),
VMPageSize);
- pTable->translate(gen.addr(), paddr);
+ } else if (allocating == NextPage) {
+ // check if we've accessed the next page on the stack
+ if (!process->checkAndAllocNextPage(gen.addr()))
+ panic("Page table fault when accessing virtual address %#x "
+ "during functional write\n", gen.addr());
} else {
return false;
}
+ pTable->translate(gen.addr(), paddr);
}
Port::writeBlob(paddr, p + prevSize, gen.size());
@@ -113,7 +120,7 @@ TranslatingPort::tryMemsetBlob(Addr addr, uint8_t val, int size)
for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
if (!pTable->translate(gen.addr(), paddr)) {
- if (allocating) {
+ if (allocating == Always) {
pTable->allocate(roundDown(gen.addr(), VMPageSize),
VMPageSize);
pTable->translate(gen.addr(), paddr);