summaryrefslogtreecommitdiff
path: root/src/mem
diff options
context:
space:
mode:
authorBrandon Potter <brandon.potter@amd.com>2016-11-09 14:27:37 -0600
committerBrandon Potter <brandon.potter@amd.com>2016-11-09 14:27:37 -0600
commit7a8dda49a4ec33be17bbd101ebd68e02562b9c3d (patch)
tree98b3bb80b66ebe424af78671c604bf0483f3db2d /src/mem
parent63bb17e4bd1d37aa22a87a9614957ce1302f95a9 (diff)
downloadgem5-7a8dda49a4ec33be17bbd101ebd68e02562b9c3d.tar.xz
style: [patch 1/22] use /r/3648/ to reorganize includes
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/abstract_mem.cc3
-rw-r--r--src/mem/bridge.cc3
-rw-r--r--src/mem/cache/prefetch/base.cc3
-rw-r--r--src/mem/cache/prefetch/queued.cc3
-rw-r--r--src/mem/cache/prefetch/stride.cc3
-rw-r--r--src/mem/coherent_xbar.cc3
-rw-r--r--src/mem/comm_monitor.cc3
-rw-r--r--src/mem/dram_ctrl.cc3
-rw-r--r--src/mem/drampower.cc3
-rw-r--r--src/mem/dramsim2.cc3
-rw-r--r--src/mem/dramsim2_wrapper.cc3
-rw-r--r--src/mem/external_master.cc3
-rw-r--r--src/mem/external_slave.cc3
-rw-r--r--src/mem/fs_translating_port_proxy.cc3
-rw-r--r--src/mem/hmc_controller.cc3
-rw-r--r--src/mem/mem_checker.cc4
-rw-r--r--src/mem/mem_checker_monitor.cc3
-rw-r--r--src/mem/noncoherent_xbar.cc3
-rw-r--r--src/mem/packet.cc3
-rw-r--r--src/mem/packet_queue.cc3
-rw-r--r--src/mem/page_table.cc3
-rw-r--r--src/mem/physical.cc5
-rw-r--r--src/mem/port.cc3
-rw-r--r--src/mem/port_proxy.cc3
-rw-r--r--src/mem/probes/base.cc1
-rw-r--r--src/mem/ruby/common/Histogram.cc3
-rw-r--r--src/mem/ruby/common/NetDest.cc4
-rw-r--r--src/mem/ruby/common/SubBlock.cc3
-rw-r--r--src/mem/ruby/filters/BlockBloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/BulkBloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/H3BloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/LSB_CountingBloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/MultiBitSelBloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/MultiGrainBloomFilter.cc3
-rw-r--r--src/mem/ruby/filters/NonCountingBloomFilter.cc3
-rw-r--r--src/mem/ruby/network/MessageBuffer.cc3
-rw-r--r--src/mem/ruby/network/Network.cc3
-rw-r--r--src/mem/ruby/network/Topology.cc4
-rw-r--r--src/mem/ruby/network/simple/PerfectSwitch.cc3
-rw-r--r--src/mem/ruby/network/simple/PerfectSwitch.hh1
-rw-r--r--src/mem/ruby/network/simple/SimpleNetwork.cc3
-rw-r--r--src/mem/ruby/network/simple/Switch.cc3
-rw-r--r--src/mem/ruby/network/simple/Throttle.cc5
-rw-r--r--src/mem/ruby/profiler/AccessTraceForAddress.cc3
-rw-r--r--src/mem/ruby/profiler/AddressProfiler.cc3
-rw-r--r--src/mem/ruby/profiler/StoreTrace.cc1
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc3
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.hh1
-rw-r--r--src/mem/ruby/slicc_interface/RubyRequest.cc4
-rw-r--r--src/mem/ruby/structures/BankedArray.cc3
-rw-r--r--src/mem/ruby/structures/CacheMemory.cc3
-rw-r--r--src/mem/ruby/structures/DirectoryMemory.cc3
-rw-r--r--src/mem/ruby/structures/LRUPolicy.cc2
-rw-r--r--src/mem/ruby/structures/Prefetcher.cc3
-rw-r--r--src/mem/ruby/structures/PseudoLRUPolicy.cc2
-rw-r--r--src/mem/ruby/structures/WireBuffer.cc3
-rw-r--r--src/mem/ruby/system/CacheRecorder.cc3
-rw-r--r--src/mem/ruby/system/DMASequencer.cc3
-rw-r--r--src/mem/ruby/system/RubyPort.cc3
-rw-r--r--src/mem/ruby/system/Sequencer.cc5
-rw-r--r--src/mem/se_translating_port_proxy.cc3
-rw-r--r--src/mem/serial_link.cc1
-rw-r--r--src/mem/simple_mem.cc3
-rw-r--r--src/mem/slicc/symbols/StateMachine.py1
-rwxr-xr-xsrc/mem/snoop_filter.cc3
-rw-r--r--src/mem/tport.cc3
-rw-r--r--src/mem/xbar.cc3
67 files changed, 125 insertions, 72 deletions
diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 75c5b559b..e05296c3e 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -42,13 +42,14 @@
* Andreas Hansson
*/
+#include "mem/abstract_mem.hh"
+
#include <vector>
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "debug/LLSC.hh"
#include "debug/MemoryAccess.hh"
-#include "mem/abstract_mem.hh"
#include "mem/packet_access.hh"
#include "sim/system.hh"
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 8a209e8b7..a7adcba64 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -48,9 +48,10 @@
* and a slave through a request and response queue.
*/
+#include "mem/bridge.hh"
+
#include "base/trace.hh"
#include "debug/Bridge.hh"
-#include "mem/bridge.hh"
#include "params/Bridge.hh"
Bridge::BridgeSlavePort::BridgeSlavePort(const std::string& _name,
diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc
index 3d22dcce6..6b4cf0586 100644
--- a/src/mem/cache/prefetch/base.cc
+++ b/src/mem/cache/prefetch/base.cc
@@ -46,10 +46,11 @@
* Hardware Prefetcher Definition.
*/
+#include "mem/cache/prefetch/base.hh"
+
#include <list>
#include "base/intmath.hh"
-#include "mem/cache/prefetch/base.hh"
#include "mem/cache/base.hh"
#include "sim/system.hh"
diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc
index 863d36900..4a685d884 100644
--- a/src/mem/cache/prefetch/queued.cc
+++ b/src/mem/cache/prefetch/queued.cc
@@ -37,8 +37,9 @@
* Authors: Mitch Hayenga
*/
-#include "debug/HWPrefetch.hh"
#include "mem/cache/prefetch/queued.hh"
+
+#include "debug/HWPrefetch.hh"
#include "mem/cache/base.hh"
QueuedPrefetcher::QueuedPrefetcher(const QueuedPrefetcherParams *p)
diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc
index 6b8fee828..e9c83f2ff 100644
--- a/src/mem/cache/prefetch/stride.cc
+++ b/src/mem/cache/prefetch/stride.cc
@@ -46,9 +46,10 @@
* Stride Prefetcher template instantiations.
*/
+#include "mem/cache/prefetch/stride.hh"
+
#include "base/random.hh"
#include "debug/HWPrefetch.hh"
-#include "mem/cache/prefetch/stride.hh"
StridePrefetcher::StridePrefetcher(const StridePrefetcherParams *p)
: QueuedPrefetcher(p),
diff --git a/src/mem/coherent_xbar.cc b/src/mem/coherent_xbar.cc
index 6cf381c21..7c3a4e314 100644
--- a/src/mem/coherent_xbar.cc
+++ b/src/mem/coherent_xbar.cc
@@ -47,11 +47,12 @@
* Definition of a crossbar object.
*/
+#include "mem/coherent_xbar.hh"
+
#include "base/misc.hh"
#include "base/trace.hh"
#include "debug/AddrRanges.hh"
#include "debug/CoherentXBar.hh"
-#include "mem/coherent_xbar.hh"
#include "sim/system.hh"
CoherentXBar::CoherentXBar(const CoherentXBarParams *p)
diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc
index 05549fd1c..df2f8ca5e 100644
--- a/src/mem/comm_monitor.cc
+++ b/src/mem/comm_monitor.cc
@@ -38,9 +38,10 @@
* Andreas Hansson
*/
+#include "mem/comm_monitor.hh"
+
#include "base/trace.hh"
#include "debug/CommMonitor.hh"
-#include "mem/comm_monitor.hh"
#include "sim/stats.hh"
CommMonitor::CommMonitor(Params* params)
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 5d4852d38..ada70279f 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -44,13 +44,14 @@
* Wendy Elsasser
*/
+#include "mem/dram_ctrl.hh"
+
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "debug/DRAM.hh"
#include "debug/DRAMPower.hh"
#include "debug/DRAMState.hh"
#include "debug/Drain.hh"
-#include "mem/dram_ctrl.hh"
#include "sim/system.hh"
using namespace std;
diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc
index d6293b0b6..d491c9612 100644
--- a/src/mem/drampower.cc
+++ b/src/mem/drampower.cc
@@ -37,8 +37,9 @@
* Authors: Omar Naji
*/
-#include "base/intmath.hh"
#include "mem/drampower.hh"
+
+#include "base/intmath.hh"
#include "sim/core.hh"
using namespace Data;
diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc
index fb1ee945b..106ea264f 100644
--- a/src/mem/dramsim2.cc
+++ b/src/mem/dramsim2.cc
@@ -37,12 +37,13 @@
* Authors: Andreas Hansson
*/
+#include "mem/dramsim2.hh"
+
#include "DRAMSim2/Callback.h"
#include "base/callback.hh"
#include "base/trace.hh"
#include "debug/DRAMSim2.hh"
#include "debug/Drain.hh"
-#include "mem/dramsim2.hh"
#include "sim/system.hh"
DRAMSim2::DRAMSim2(const Params* p) :
diff --git a/src/mem/dramsim2_wrapper.cc b/src/mem/dramsim2_wrapper.cc
index 34a7ad5d5..841ae4391 100644
--- a/src/mem/dramsim2_wrapper.cc
+++ b/src/mem/dramsim2_wrapper.cc
@@ -48,12 +48,13 @@
#undef DEBUG
#endif
+#include "mem/dramsim2_wrapper.hh"
+
#include <fstream>
#include "DRAMSim2/MultiChannelMemorySystem.h"
#include "base/compiler.hh"
#include "base/misc.hh"
-#include "mem/dramsim2_wrapper.hh"
/**
* DRAMSim2 requires SHOW_SIM_OUTPUT to be defined (declared extern in
diff --git a/src/mem/external_master.cc b/src/mem/external_master.cc
index 74c5a6f43..94fdc39cf 100644
--- a/src/mem/external_master.cc
+++ b/src/mem/external_master.cc
@@ -38,11 +38,12 @@
* Curtis Dunham
*/
+#include "mem/external_master.hh"
+
#include <cctype>
#include <iomanip>
#include "debug/ExternalPort.hh"
-#include "mem/external_master.hh"
std::map<std::string, ExternalMaster::Handler *>
ExternalMaster::portHandlers;
diff --git a/src/mem/external_slave.cc b/src/mem/external_slave.cc
index fadeff833..2d7ba1a65 100644
--- a/src/mem/external_slave.cc
+++ b/src/mem/external_slave.cc
@@ -37,11 +37,12 @@
* Authors: Andrew Bardsley
*/
+#include "mem/external_slave.hh"
+
#include <cctype>
#include <iomanip>
#include "debug/ExternalPort.hh"
-#include "mem/external_slave.hh"
/** Implement a `stub' port which just responds to requests by printing
* a message. The stub port can be used to configure and test a system
diff --git a/src/mem/fs_translating_port_proxy.cc b/src/mem/fs_translating_port_proxy.cc
index a3229d7d1..616c12e5e 100644
--- a/src/mem/fs_translating_port_proxy.cc
+++ b/src/mem/fs_translating_port_proxy.cc
@@ -46,11 +46,12 @@
* Port object definitions.
*/
+#include "mem/fs_translating_port_proxy.hh"
+
#include "arch/vtophys.hh"
#include "base/chunk_generator.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/fs_translating_port_proxy.hh"
#include "sim/system.hh"
using namespace TheISA;
diff --git a/src/mem/hmc_controller.cc b/src/mem/hmc_controller.cc
index 18c12622a..c8938b721 100644
--- a/src/mem/hmc_controller.cc
+++ b/src/mem/hmc_controller.cc
@@ -1,6 +1,7 @@
+#include "mem/hmc_controller.hh"
+
#include "base/random.hh"
#include "debug/HMCController.hh"
-#include "mem/hmc_controller.hh"
HMCController::HMCController(const HMCControllerParams* p) :
NoncoherentXBar(p),
diff --git a/src/mem/mem_checker.cc b/src/mem/mem_checker.cc
index dba4b5025..810683ca4 100644
--- a/src/mem/mem_checker.cc
+++ b/src/mem/mem_checker.cc
@@ -38,10 +38,10 @@
* Marco Elver
*/
-#include <cassert>
-
#include "mem/mem_checker.hh"
+#include <cassert>
+
void
MemChecker::WriteCluster::startWrite(MemChecker::Serial serial, Tick _start,
uint8_t data)
diff --git a/src/mem/mem_checker_monitor.cc b/src/mem/mem_checker_monitor.cc
index 971dfc048..2a25d21ab 100644
--- a/src/mem/mem_checker_monitor.cc
+++ b/src/mem/mem_checker_monitor.cc
@@ -39,12 +39,13 @@
* Marco Elver
*/
+#include "mem/mem_checker_monitor.hh"
+
#include <memory>
#include "base/output.hh"
#include "base/trace.hh"
#include "debug/MemCheckerMonitor.hh"
-#include "mem/mem_checker_monitor.hh"
using namespace std;
diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc
index bd7258f9f..eeaa4fb0b 100644
--- a/src/mem/noncoherent_xbar.cc
+++ b/src/mem/noncoherent_xbar.cc
@@ -47,11 +47,12 @@
* Definition of a non-coherent crossbar object.
*/
+#include "mem/noncoherent_xbar.hh"
+
#include "base/misc.hh"
#include "base/trace.hh"
#include "debug/NoncoherentXBar.hh"
#include "debug/XBar.hh"
-#include "mem/noncoherent_xbar.hh"
NoncoherentXBar::NoncoherentXBar(const NoncoherentXBarParams *p)
: BaseXBar(p)
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index 7efed73b0..371058b25 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -48,13 +48,14 @@
* between a single level of the memory heirarchy (ie L1->L2).
*/
+#include "mem/packet.hh"
+
#include <cstring>
#include <iostream>
#include "base/cprintf.hh"
#include "base/misc.hh"
#include "base/trace.hh"
-#include "mem/packet.hh"
using namespace std;
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index ca8422f52..f7df3314f 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -41,10 +41,11 @@
* Andreas Hansson
*/
+#include "mem/packet_queue.hh"
+
#include "base/trace.hh"
#include "debug/Drain.hh"
#include "debug/PacketQueue.hh"
-#include "mem/packet_queue.hh"
using namespace std;
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 6875d6f9b..f47227f5a 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -35,6 +35,8 @@
* @file
* Definitions of functional page table.
*/
+#include "mem/page_table.hh"
+
#include <fstream>
#include <map>
#include <memory>
@@ -45,7 +47,6 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "debug/MMU.hh"
-#include "mem/page_table.hh"
#include "sim/faults.hh"
#include "sim/sim_object.hh"
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 05881b224..586f1c475 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -37,10 +37,12 @@
* Authors: Andreas Hansson
*/
+#include "mem/physical.hh"
+
+#include <fcntl.h>
#include <sys/mman.h>
#include <sys/types.h>
#include <sys/user.h>
-#include <fcntl.h>
#include <unistd.h>
#include <zlib.h>
@@ -54,7 +56,6 @@
#include "debug/AddrRanges.hh"
#include "debug/Checkpoint.hh"
#include "mem/abstract_mem.hh"
-#include "mem/physical.hh"
/**
* On Linux, MAP_NORESERVE allow us to simulate a very large memory
diff --git a/src/mem/port.cc b/src/mem/port.cc
index 91b9408eb..2111fa429 100644
--- a/src/mem/port.cc
+++ b/src/mem/port.cc
@@ -46,9 +46,10 @@
* @file
* Port object definitions.
*/
+#include "mem/port.hh"
+
#include "base/trace.hh"
#include "mem/mem_object.hh"
-#include "mem/port.hh"
Port::Port(const std::string &_name, MemObject& _owner, PortID _id)
: portName(_name), id(_id), owner(_owner)
diff --git a/src/mem/port_proxy.cc b/src/mem/port_proxy.cc
index f0158ec2d..f40c64e2e 100644
--- a/src/mem/port_proxy.cc
+++ b/src/mem/port_proxy.cc
@@ -37,9 +37,10 @@
* Authors: Andreas Hansson
*/
-#include "base/chunk_generator.hh"
#include "mem/port_proxy.hh"
+#include "base/chunk_generator.hh"
+
void
PortProxy::readBlob(Addr addr, uint8_t *p, int size) const
{
diff --git a/src/mem/probes/base.cc b/src/mem/probes/base.cc
index 36c9a58e4..39c25fc18 100644
--- a/src/mem/probes/base.cc
+++ b/src/mem/probes/base.cc
@@ -41,7 +41,6 @@
#include "params/BaseMemProbe.hh"
-
BaseMemProbe::BaseMemProbe(BaseMemProbeParams *p)
: SimObject(p)
{
diff --git a/src/mem/ruby/common/Histogram.cc b/src/mem/ruby/common/Histogram.cc
index 31de160cf..209802bf1 100644
--- a/src/mem/ruby/common/Histogram.cc
+++ b/src/mem/ruby/common/Histogram.cc
@@ -26,11 +26,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/common/Histogram.hh"
+
#include <cmath>
#include <iomanip>
#include "base/intmath.hh"
-#include "mem/ruby/common/Histogram.hh"
using namespace std;
diff --git a/src/mem/ruby/common/NetDest.cc b/src/mem/ruby/common/NetDest.cc
index 0a89bda53..3a28646f3 100644
--- a/src/mem/ruby/common/NetDest.cc
+++ b/src/mem/ruby/common/NetDest.cc
@@ -26,10 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <algorithm>
-
#include "mem/ruby/common/NetDest.hh"
+#include <algorithm>
+
NetDest::NetDest()
{
resize();
diff --git a/src/mem/ruby/common/SubBlock.cc b/src/mem/ruby/common/SubBlock.cc
index 5175cb950..98fec99a2 100644
--- a/src/mem/ruby/common/SubBlock.cc
+++ b/src/mem/ruby/common/SubBlock.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "base/stl_helpers.hh"
#include "mem/ruby/common/SubBlock.hh"
+#include "base/stl_helpers.hh"
+
using m5::stl_helpers::operator<<;
SubBlock::SubBlock(Addr addr, int size)
diff --git a/src/mem/ruby/filters/BlockBloomFilter.cc b/src/mem/ruby/filters/BlockBloomFilter.cc
index a453c373f..9587fa927 100644
--- a/src/mem/ruby/filters/BlockBloomFilter.cc
+++ b/src/mem/ruby/filters/BlockBloomFilter.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/filters/BlockBloomFilter.hh"
+
#include "base/intmath.hh"
#include "base/str.hh"
-#include "mem/ruby/filters/BlockBloomFilter.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/filters/BulkBloomFilter.cc b/src/mem/ruby/filters/BulkBloomFilter.cc
index f634b13ad..3bd2b4d32 100644
--- a/src/mem/ruby/filters/BulkBloomFilter.cc
+++ b/src/mem/ruby/filters/BulkBloomFilter.cc
@@ -26,11 +26,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/filters/BulkBloomFilter.hh"
+
#include <cassert>
#include "base/intmath.hh"
#include "base/str.hh"
-#include "mem/ruby/filters/BulkBloomFilter.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/filters/H3BloomFilter.cc b/src/mem/ruby/filters/H3BloomFilter.cc
index a9a0cdc5b..10dc4d283 100644
--- a/src/mem/ruby/filters/H3BloomFilter.cc
+++ b/src/mem/ruby/filters/H3BloomFilter.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "base/intmath.hh"
#include "mem/ruby/filters/H3BloomFilter.hh"
+#include "base/intmath.hh"
+
using namespace std;
static int H3[64][16] = {
diff --git a/src/mem/ruby/filters/LSB_CountingBloomFilter.cc b/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
index eaac5c4a2..e8050b16d 100644
--- a/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
+++ b/src/mem/ruby/filters/LSB_CountingBloomFilter.cc
@@ -26,8 +26,9 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "base/intmath.hh"
#include "mem/ruby/filters/LSB_CountingBloomFilter.hh"
+
+#include "base/intmath.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/filters/MultiBitSelBloomFilter.cc b/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
index 4cbf25f57..5faaa10da 100644
--- a/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
+++ b/src/mem/ruby/filters/MultiBitSelBloomFilter.cc
@@ -26,11 +26,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/filters/MultiBitSelBloomFilter.hh"
+
#include <vector>
#include "base/intmath.hh"
#include "base/str.hh"
-#include "mem/ruby/filters/MultiBitSelBloomFilter.hh"
using namespace std;
diff --git a/src/mem/ruby/filters/MultiGrainBloomFilter.cc b/src/mem/ruby/filters/MultiGrainBloomFilter.cc
index 0226a2957..c1d558c8c 100644
--- a/src/mem/ruby/filters/MultiGrainBloomFilter.cc
+++ b/src/mem/ruby/filters/MultiGrainBloomFilter.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/filters/MultiGrainBloomFilter.hh"
+
#include "base/intmath.hh"
#include "base/str.hh"
-#include "mem/ruby/filters/MultiGrainBloomFilter.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/filters/NonCountingBloomFilter.cc b/src/mem/ruby/filters/NonCountingBloomFilter.cc
index fe76f7c90..15b169794 100644
--- a/src/mem/ruby/filters/NonCountingBloomFilter.cc
+++ b/src/mem/ruby/filters/NonCountingBloomFilter.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/filters/NonCountingBloomFilter.hh"
+
#include "base/intmath.hh"
#include "base/str.hh"
-#include "mem/ruby/filters/NonCountingBloomFilter.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/network/MessageBuffer.cc b/src/mem/ruby/network/MessageBuffer.cc
index b96b00504..d7e1d0384 100644
--- a/src/mem/ruby/network/MessageBuffer.cc
+++ b/src/mem/ruby/network/MessageBuffer.cc
@@ -26,6 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/MessageBuffer.hh"
+
#include <cassert>
#include "base/cprintf.hh"
@@ -33,7 +35,6 @@
#include "base/random.hh"
#include "base/stl_helpers.hh"
#include "debug/RubyQueue.hh"
-#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/network/Network.cc b/src/mem/ruby/network/Network.cc
index 721dbbabe..e9b28a731 100644
--- a/src/mem/ruby/network/Network.cc
+++ b/src/mem/ruby/network/Network.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/Network.hh"
+
#include "base/misc.hh"
#include "mem/ruby/network/BasicLink.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/system/RubySystem.hh"
uint32_t Network::m_virtual_networks;
diff --git a/src/mem/ruby/network/Topology.cc b/src/mem/ruby/network/Topology.cc
index c18f379ae..f7afffd66 100644
--- a/src/mem/ruby/network/Topology.cc
+++ b/src/mem/ruby/network/Topology.cc
@@ -26,13 +26,15 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/Topology.hh"
+
#include <cassert>
#include "base/trace.hh"
#include "debug/RubyNetwork.hh"
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/BasicLink.hh"
-#include "mem/ruby/network/Topology.hh"
+#include "mem/ruby/network/Network.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
using namespace std;
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc
index 027c8baee..156b96d23 100644
--- a/src/mem/ruby/network/simple/PerfectSwitch.cc
+++ b/src/mem/ruby/network/simple/PerfectSwitch.cc
@@ -26,13 +26,14 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/simple/PerfectSwitch.hh"
+
#include <algorithm>
#include "base/cast.hh"
#include "base/random.hh"
#include "debug/RubyNetwork.hh"
#include "mem/ruby/network/MessageBuffer.hh"
-#include "mem/ruby/network/simple/PerfectSwitch.hh"
#include "mem/ruby/network/simple/SimpleNetwork.hh"
#include "mem/ruby/network/simple/Switch.hh"
#include "mem/ruby/slicc_interface/Message.hh"
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.hh b/src/mem/ruby/network/simple/PerfectSwitch.hh
index 1cc986964..12d5e468c 100644
--- a/src/mem/ruby/network/simple/PerfectSwitch.hh
+++ b/src/mem/ruby/network/simple/PerfectSwitch.hh
@@ -41,6 +41,7 @@
#include <vector>
#include "mem/ruby/common/Consumer.hh"
+#include "mem/ruby/common/TypeDefines.hh"
class MessageBuffer;
class NetDest;
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc
index 1652ae7bb..56f948f4c 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.cc
+++ b/src/mem/ruby/network/simple/SimpleNetwork.cc
@@ -26,6 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/simple/SimpleNetwork.hh"
+
#include <cassert>
#include <numeric>
@@ -34,7 +36,6 @@
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/network/simple/SimpleLink.hh"
-#include "mem/ruby/network/simple/SimpleNetwork.hh"
#include "mem/ruby/network/simple/Switch.hh"
#include "mem/ruby/network/simple/Throttle.hh"
#include "mem/ruby/profiler/Profiler.hh"
diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc
index 78f5b609c..7cc635d2a 100644
--- a/src/mem/ruby/network/simple/Switch.cc
+++ b/src/mem/ruby/network/simple/Switch.cc
@@ -26,6 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/simple/Switch.hh"
+
#include <numeric>
#include "base/cast.hh"
@@ -33,7 +35,6 @@
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
#include "mem/ruby/network/simple/SimpleNetwork.hh"
-#include "mem/ruby/network/simple/Switch.hh"
#include "mem/ruby/network/simple/Throttle.hh"
using namespace std;
diff --git a/src/mem/ruby/network/simple/Throttle.cc b/src/mem/ruby/network/simple/Throttle.cc
index 3863ab944..5ed918c6b 100644
--- a/src/mem/ruby/network/simple/Throttle.cc
+++ b/src/mem/ruby/network/simple/Throttle.cc
@@ -26,15 +26,16 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/network/simple/Throttle.hh"
+
#include <cassert>
#include "base/cast.hh"
#include "base/cprintf.hh"
#include "debug/RubyNetwork.hh"
-#include "mem/ruby/network/simple/Switch.hh"
-#include "mem/ruby/network/simple/Throttle.hh"
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/network/Network.hh"
+#include "mem/ruby/network/simple/Switch.hh"
#include "mem/ruby/slicc_interface/Message.hh"
#include "mem/ruby/system/RubySystem.hh"
diff --git a/src/mem/ruby/profiler/AccessTraceForAddress.cc b/src/mem/ruby/profiler/AccessTraceForAddress.cc
index dc5f1ac8d..58227663e 100644
--- a/src/mem/ruby/profiler/AccessTraceForAddress.cc
+++ b/src/mem/ruby/profiler/AccessTraceForAddress.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "mem/ruby/common/Histogram.hh"
#include "mem/ruby/profiler/AccessTraceForAddress.hh"
+#include "mem/ruby/common/Histogram.hh"
+
AccessTraceForAddress::~AccessTraceForAddress()
{
if (m_histogram_ptr) {
diff --git a/src/mem/ruby/profiler/AddressProfiler.cc b/src/mem/ruby/profiler/AddressProfiler.cc
index 52c693330..087b77474 100644
--- a/src/mem/ruby/profiler/AddressProfiler.cc
+++ b/src/mem/ruby/profiler/AddressProfiler.cc
@@ -26,11 +26,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/profiler/AddressProfiler.hh"
+
#include <vector>
#include "base/stl_helpers.hh"
#include "mem/protocol/RubyRequest.hh"
-#include "mem/ruby/profiler/AddressProfiler.hh"
#include "mem/ruby/profiler/Profiler.hh"
using namespace std;
diff --git a/src/mem/ruby/profiler/StoreTrace.cc b/src/mem/ruby/profiler/StoreTrace.cc
index c3c1f8a19..9db1d489c 100644
--- a/src/mem/ruby/profiler/StoreTrace.cc
+++ b/src/mem/ruby/profiler/StoreTrace.cc
@@ -27,6 +27,7 @@
*/
#include "mem/ruby/profiler/StoreTrace.hh"
+
#include "sim/core.hh"
using namespace std;
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index f737707bd..19dca9028 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -30,9 +30,10 @@
#include "debug/RubyQueue.hh"
#include "mem/protocol/MemoryMsg.hh"
+#include "mem/ruby/network/Network.hh"
+#include "mem/ruby/system/GPUCoalescer.hh"
#include "mem/ruby/system/RubySystem.hh"
#include "mem/ruby/system/Sequencer.hh"
-#include "mem/ruby/system/GPUCoalescer.hh"
#include "sim/system.hh"
AbstractController::AbstractController(const Params *p)
diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh
index 6f49e5ec4..e4562145f 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.hh
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh
@@ -41,7 +41,6 @@
#include "mem/ruby/common/Histogram.hh"
#include "mem/ruby/common/MachineID.hh"
#include "mem/ruby/network/MessageBuffer.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/system/CacheRecorder.hh"
#include "mem/packet.hh"
#include "mem/qport.hh"
diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc
index c4c5b2faf..dd26ad645 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.cc
+++ b/src/mem/ruby/slicc_interface/RubyRequest.cc
@@ -26,10 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <iostream>
-
#include "mem/ruby/slicc_interface/RubyRequest.hh"
+#include <iostream>
+
using namespace std;
void
diff --git a/src/mem/ruby/structures/BankedArray.cc b/src/mem/ruby/structures/BankedArray.cc
index 5054eae8a..091bcbdf6 100644
--- a/src/mem/ruby/structures/BankedArray.cc
+++ b/src/mem/ruby/structures/BankedArray.cc
@@ -29,8 +29,9 @@
*
*/
-#include "base/intmath.hh"
#include "mem/ruby/structures/BankedArray.hh"
+
+#include "base/intmath.hh"
#include "mem/ruby/system/RubySystem.hh"
BankedArray::BankedArray(unsigned int banks, Cycles accessLatency,
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 36d109769..8d99c90aa 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -27,13 +27,14 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/structures/CacheMemory.hh"
+
#include "base/intmath.hh"
#include "debug/RubyCache.hh"
#include "debug/RubyCacheTrace.hh"
#include "debug/RubyResourceStalls.hh"
#include "debug/RubyStats.hh"
#include "mem/protocol/AccessPermission.hh"
-#include "mem/ruby/structures/CacheMemory.hh"
#include "mem/ruby/system/RubySystem.hh"
#include "mem/ruby/system/WeightedLRUPolicy.hh"
diff --git a/src/mem/ruby/structures/DirectoryMemory.cc b/src/mem/ruby/structures/DirectoryMemory.cc
index 8aad6f4fa..f79382c26 100644
--- a/src/mem/ruby/structures/DirectoryMemory.cc
+++ b/src/mem/ruby/structures/DirectoryMemory.cc
@@ -26,11 +26,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/structures/DirectoryMemory.hh"
+
#include "base/intmath.hh"
#include "debug/RubyCache.hh"
#include "debug/RubyStats.hh"
#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
-#include "mem/ruby/structures/DirectoryMemory.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/structures/LRUPolicy.cc b/src/mem/ruby/structures/LRUPolicy.cc
index 1c4990291..3b6d91754 100644
--- a/src/mem/ruby/structures/LRUPolicy.cc
+++ b/src/mem/ruby/structures/LRUPolicy.cc
@@ -30,8 +30,6 @@
#include "mem/ruby/structures/LRUPolicy.hh"
-
-
LRUPolicy::LRUPolicy(const Params * p)
: AbstractReplacementPolicy(p)
{
diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc
index eef51dcf7..df8fdfcba 100644
--- a/src/mem/ruby/structures/Prefetcher.cc
+++ b/src/mem/ruby/structures/Prefetcher.cc
@@ -26,9 +26,10 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/structures/Prefetcher.hh"
+
#include "debug/RubyPrefetcher.hh"
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
-#include "mem/ruby/structures/Prefetcher.hh"
#include "mem/ruby/system/RubySystem.hh"
Prefetcher*
diff --git a/src/mem/ruby/structures/PseudoLRUPolicy.cc b/src/mem/ruby/structures/PseudoLRUPolicy.cc
index 954e7444a..e423bb58d 100644
--- a/src/mem/ruby/structures/PseudoLRUPolicy.cc
+++ b/src/mem/ruby/structures/PseudoLRUPolicy.cc
@@ -30,8 +30,6 @@
#include "mem/ruby/structures/PseudoLRUPolicy.hh"
-
-
PseudoLRUPolicy::PseudoLRUPolicy(const Params * p)
: AbstractReplacementPolicy(p)
{
diff --git a/src/mem/ruby/structures/WireBuffer.cc b/src/mem/ruby/structures/WireBuffer.cc
index c46aea071..15398d8c0 100644
--- a/src/mem/ruby/structures/WireBuffer.cc
+++ b/src/mem/ruby/structures/WireBuffer.cc
@@ -29,12 +29,13 @@
*
*/
+#include "mem/ruby/structures/WireBuffer.hh"
+
#include <algorithm>
#include <functional>
#include "base/cprintf.hh"
#include "base/stl_helpers.hh"
-#include "mem/ruby/structures/WireBuffer.hh"
#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/system/CacheRecorder.cc b/src/mem/ruby/system/CacheRecorder.cc
index 78d6939fc..83e8a70dd 100644
--- a/src/mem/ruby/system/CacheRecorder.cc
+++ b/src/mem/ruby/system/CacheRecorder.cc
@@ -27,8 +27,9 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "debug/RubyCacheTrace.hh"
#include "mem/ruby/system/CacheRecorder.hh"
+
+#include "debug/RubyCacheTrace.hh"
#include "mem/ruby/system/RubySystem.hh"
#include "mem/ruby/system/Sequencer.hh"
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index 58714ab10..0ad8a205d 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -26,13 +26,14 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/system/DMASequencer.hh"
+
#include <memory>
#include "debug/RubyDma.hh"
#include "debug/RubyStats.hh"
#include "mem/protocol/SequencerMsg.hh"
#include "mem/protocol/SequencerRequestType.hh"
-#include "mem/ruby/system/DMASequencer.hh"
#include "mem/ruby/system/RubySystem.hh"
DMARequest::DMARequest(uint64_t start_paddr, int len, bool write,
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 7f0e6f82d..5b94f80ed 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -39,13 +39,14 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/system/RubyPort.hh"
+
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/Config.hh"
#include "debug/Drain.hh"
#include "debug/Ruby.hh"
#include "mem/protocol/AccessPermission.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
-#include "mem/ruby/system/RubyPort.hh"
#include "mem/simple_mem.hh"
#include "sim/full_system.hh"
#include "sim/system.hh"
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 982c1c811..7fdd52623 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -26,6 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "mem/ruby/system/Sequencer.hh"
+
#include "arch/x86/ldstflags.hh"
#include "base/misc.hh"
#include "base/str.hh"
@@ -34,13 +36,12 @@
#include "debug/ProtocolTrace.hh"
#include "debug/RubySequencer.hh"
#include "debug/RubyStats.hh"
+#include "mem/packet.hh"
#include "mem/protocol/PrefetchBit.hh"
#include "mem/protocol/RubyAccessMode.hh"
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/slicc_interface/RubyRequest.hh"
#include "mem/ruby/system/RubySystem.hh"
-#include "mem/ruby/system/Sequencer.hh"
-#include "mem/packet.hh"
#include "sim/system.hh"
using namespace std;
diff --git a/src/mem/se_translating_port_proxy.cc b/src/mem/se_translating_port_proxy.cc
index 7dfeb9343..6c5191caf 100644
--- a/src/mem/se_translating_port_proxy.cc
+++ b/src/mem/se_translating_port_proxy.cc
@@ -42,13 +42,14 @@
* Andreas Hansson
*/
+#include "mem/se_translating_port_proxy.hh"
+
#include <string>
#include "arch/isa_traits.hh"
#include "base/chunk_generator.hh"
#include "config/the_isa.hh"
#include "mem/page_table.hh"
-#include "mem/se_translating_port_proxy.hh"
#include "sim/process.hh"
#include "sim/system.hh"
diff --git a/src/mem/serial_link.cc b/src/mem/serial_link.cc
index 25f5291bb..ee21163b7 100644
--- a/src/mem/serial_link.cc
+++ b/src/mem/serial_link.cc
@@ -56,7 +56,6 @@
#include "debug/SerialLink.hh"
#include "params/SerialLink.hh"
-
SerialLink::SerialLinkSlavePort::SerialLinkSlavePort(const std::string& _name,
SerialLink& _serial_link,
SerialLinkMasterPort& _masterPort,
diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc
index bb44b8c85..f3a01b5b0 100644
--- a/src/mem/simple_mem.cc
+++ b/src/mem/simple_mem.cc
@@ -42,8 +42,9 @@
* Andreas Hansson
*/
-#include "base/random.hh"
#include "mem/simple_mem.hh"
+
+#include "base/random.hh"
#include "debug/Drain.hh"
using namespace std;
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 3f88d8387..817ddb481 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -470,6 +470,7 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
#include "mem/protocol/${ident}_Event.hh"
#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
+#include "mem/ruby/network/Network.hh"
#include "mem/ruby/system/RubySystem.hh"
''')
diff --git a/src/mem/snoop_filter.cc b/src/mem/snoop_filter.cc
index eb500cf72..e8f449504 100755
--- a/src/mem/snoop_filter.cc
+++ b/src/mem/snoop_filter.cc
@@ -42,10 +42,11 @@
* Implementation of a snoop filter.
*/
+#include "mem/snoop_filter.hh"
+
#include "base/misc.hh"
#include "base/trace.hh"
#include "debug/SnoopFilter.hh"
-#include "mem/snoop_filter.hh"
#include "sim/system.hh"
void
diff --git a/src/mem/tport.cc b/src/mem/tport.cc
index b80c2d93a..fce4f6ca2 100644
--- a/src/mem/tport.cc
+++ b/src/mem/tport.cc
@@ -41,9 +41,10 @@
* Andreas Hansson
*/
-#include "mem/mem_object.hh"
#include "mem/tport.hh"
+#include "mem/mem_object.hh"
+
SimpleTimingPort::SimpleTimingPort(const std::string& _name,
MemObject* _owner) :
QueuedSlavePort(_name, _owner, queueImpl), queueImpl(*_owner, *this)
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index 416b02931..035461944 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -47,12 +47,13 @@
* Definition of a crossbar object.
*/
+#include "mem/xbar.hh"
+
#include "base/misc.hh"
#include "base/trace.hh"
#include "debug/AddrRanges.hh"
#include "debug/Drain.hh"
#include "debug/XBar.hh"
-#include "mem/xbar.hh"
BaseXBar::BaseXBar(const BaseXBarParams *p)
: MemObject(p),