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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-22 16:09:34 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-08-22 16:09:34 -0400 |
| commit | 95e7b85c8beff5cb2db39cb9f63280e82d495cec (patch) | |
| tree | 59f261185efe7ed75450bb8070075e1f7bc125d5 /src/mem | |
| parent | 9f18764441831b08b8700a8895ae7316f0ed7508 (diff) | |
| download | gem5-95e7b85c8beff5cb2db39cb9f63280e82d495cec.tar.xz | |
Still need LL/SC support in cache, add hack to always return success for now
--HG--
extra : convert_revision : b354bd91be8c1bbb3aca7b4ba9e7e3e117ced164
Diffstat (limited to 'src/mem')
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 2f9415852..11cd84e88 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -60,6 +60,9 @@ doTimingAccess(Packet *pkt, CachePort *cachePort, bool isCpuSide) { if (isCpuSide) { + if (pkt->isWrite() && (pkt->req->getFlags() & LOCKED)) { + pkt->req->setScResult(1); + } access(pkt); } else @@ -79,6 +82,11 @@ doAtomicAccess(Packet *pkt, bool isCpuSide) { if (isCpuSide) { + //Temporary solution to LL/SC + if (pkt->isWrite() && (pkt->req->getFlags() & LOCKED)) { + pkt->req->setScResult(1); + } + probe(pkt, true); //TEMP ALWAYS SUCCES FOR NOW pkt->result = Packet::Success; @@ -103,6 +111,12 @@ doFunctionalAccess(Packet *pkt, bool isCpuSide) { //TEMP USE CPU?THREAD 0 0 pkt->req->setThreadContext(0,0); + + //Temporary solution to LL/SC + if (pkt->isWrite() && (pkt->req->getFlags() & LOCKED)) { + assert("Can't handle LL/SC on functional path\n"); + } + probe(pkt, true); //TEMP ALWAYS SUCCESFUL FOR NOW pkt->result = Packet::Success; |