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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2014-05-31 18:00:23 -0700 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2014-05-31 18:00:23 -0700 |
commit | 0be64ffe2f4ff8824b3084362706ffbf456ea490 (patch) | |
tree | 795d803dcfaa3b92faa1155ce2c835daf2d76290 /src/mem | |
parent | 2a8088f5aec433b6a1a2330f4fbc29ae28b5ee73 (diff) | |
download | gem5-0be64ffe2f4ff8824b3084362706ffbf456ea490.tar.xz |
style: eliminate equality tests with true and false
Using '== true' in a boolean expression is totally redundant,
and using '== false' is pretty verbose (and arguably less
readable in most cases) compared to '!'.
It's somewhat of a pet peeve, perhaps, but I had some time
waiting for some tests to run and decided to clean these up.
Unfortunately, SLICC appears not to have the '!' operator,
so I had to leave the '== false' tests in the SLICC code.
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L1cache.sm | 6 | ||||
-rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L2cache.sm | 8 | ||||
-rw-r--r-- | src/mem/protocol/MOESI_CMP_token-dir.sm | 2 | ||||
-rw-r--r-- | src/mem/ruby/buffers/MessageBuffer.cc | 2 | ||||
-rw-r--r-- | src/mem/ruby/slicc_interface/NetworkMessage.hh | 4 | ||||
-rw-r--r-- | src/mem/ruby/system/DMASequencer.cc | 6 | ||||
-rw-r--r-- | src/mem/slicc/ast/PeekStatementAST.py | 7 |
7 files changed, 17 insertions, 18 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L1cache.sm b/src/mem/protocol/MOESI_CMP_token-L1cache.sm index 7400ba12e..2b15dc8bf 100644 --- a/src/mem/protocol/MOESI_CMP_token-L1cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L1cache.sm @@ -261,7 +261,7 @@ machine(L1Cache, "Token protocol") } else if (is_valid(cache_entry)) { return cache_entry.CacheState; } else { - if ((persistentTable.isLocked(addr) == true) && (persistentTable.findSmallest(addr) != machineID)) { + if (persistentTable.isLocked(addr) && (persistentTable.findSmallest(addr) != machineID)) { // Not in cache, in persistent table, but this processor isn't highest priority return State:I_L; } else { @@ -1401,7 +1401,7 @@ machine(L1Cache, "Token protocol") assert(is_valid(tbe)); if (tbe.WentPersistent) { - // assert(starving == true); + // assert(starving); outstandingRequests := outstandingRequests - 1; enqueue(persistentNetwork_out, PersistentMsg, l1_request_latency) { out_msg.Addr := address; @@ -1428,7 +1428,7 @@ machine(L1Cache, "Token protocol") // Update average latency if (tbe.IssueCount <= 1) { - if (tbe.ExternalResponse == true) { + if (tbe.ExternalResponse) { updateAverageLatencyEstimate(curCycle() - tbe.IssueTime); } } diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm index b429a68aa..f0fa8227d 100644 --- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm @@ -165,7 +165,7 @@ machine(L2Cache, "Token protocol") State getState(Entry cache_entry, Address addr) { if (is_valid(cache_entry)) { return cache_entry.CacheState; - } else if (persistentTable.isLocked(addr) == true) { + } else if (persistentTable.isLocked(addr)) { return State:I_L; } else { return State:NP; @@ -250,7 +250,7 @@ machine(L2Cache, "Token protocol") bool exclusiveExists(Address addr) { if (localDirectory.isTagPresent(addr)) { - if (localDirectory[addr].exclusive == true) { + if (localDirectory[addr].exclusive) { return true; } else { @@ -285,7 +285,7 @@ machine(L2Cache, "Token protocol") } void clearExclusiveBitIfExists(Address addr) { - if (localDirectory.isTagPresent(addr) == true) { + if (localDirectory.isTagPresent(addr)) { localDirectory[addr].exclusive := false; } } @@ -761,7 +761,7 @@ machine(L2Cache, "Token protocol") action(j_forwardTransientRequestToLocalSharers, "j", desc="Forward external transient request to local sharers") { peek(requestNetwork_in, RequestMsg) { - if (filtering_enabled == true && in_msg.RetryNum == 0 && sharersExist(in_msg.Addr) == false) { + if (filtering_enabled && in_msg.RetryNum == 0 && sharersExist(in_msg.Addr) == false) { //profile_filter_action(1); DPRINTF(RubySlicc, "filtered message, Retry Num: %d\n", in_msg.RetryNum); diff --git a/src/mem/protocol/MOESI_CMP_token-dir.sm b/src/mem/protocol/MOESI_CMP_token-dir.sm index f7d3f1fa2..4354d7c4c 100644 --- a/src/mem/protocol/MOESI_CMP_token-dir.sm +++ b/src/mem/protocol/MOESI_CMP_token-dir.sm @@ -708,7 +708,7 @@ machine(Directory, "Token protocol") action(s_deallocateTBE, "s", desc="Deallocate TBE") { if (tbe.WentPersistent) { - assert(starving == true); + assert(starving); enqueue(persistentNetwork_out, PersistentMsg, 1) { out_msg.Addr := address; diff --git a/src/mem/ruby/buffers/MessageBuffer.cc b/src/mem/ruby/buffers/MessageBuffer.cc index 298fdb3c3..b63b07976 100644 --- a/src/mem/ruby/buffers/MessageBuffer.cc +++ b/src/mem/ruby/buffers/MessageBuffer.cc @@ -160,7 +160,7 @@ MessageBuffer::enqueue(MsgPtr message, Cycles delta) Tick current_time = m_sender->clockEdge(); Tick arrival_time = 0; - if (!RubySystem::getRandomization() || (m_randomization == false)) { + if (!RubySystem::getRandomization() || !m_randomization) { // No randomization arrival_time = current_time + delta * m_sender->clockPeriod(); } else { diff --git a/src/mem/ruby/slicc_interface/NetworkMessage.hh b/src/mem/ruby/slicc_interface/NetworkMessage.hh index 03d05d15d..10d78251a 100644 --- a/src/mem/ruby/slicc_interface/NetworkMessage.hh +++ b/src/mem/ruby/slicc_interface/NetworkMessage.hh @@ -60,7 +60,7 @@ class NetworkMessage : public Message const NetDest& getInternalDestination() const { - if (m_internal_dest_valid == false) + if (!m_internal_dest_valid) return getDestination(); return m_internal_dest; @@ -69,7 +69,7 @@ class NetworkMessage : public Message NetDest& getInternalDestination() { - if (m_internal_dest_valid == false) { + if (!m_internal_dest_valid) { m_internal_dest = getDestination(); m_internal_dest_valid = true; } diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index 469d19be6..9b0157b45 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -94,7 +94,7 @@ DMASequencer::makeRequest(PacketPtr pkt) void DMASequencer::issueNext() { - assert(m_is_busy == true); + assert(m_is_busy); active_request.bytes_completed = active_request.bytes_issued; if (active_request.len == active_request.bytes_completed) { // @@ -144,12 +144,12 @@ DMASequencer::issueNext() void DMASequencer::dataCallback(const DataBlock & dblk) { - assert(m_is_busy == true); + assert(m_is_busy); int len = active_request.bytes_issued - active_request.bytes_completed; int offset = 0; if (active_request.bytes_completed == 0) offset = active_request.start_paddr & m_data_block_mask; - assert(active_request.write == false); + assert(!active_request.write); if (active_request.data != NULL) { memcpy(&active_request.data[active_request.bytes_completed], dblk.getData(offset, len), len); diff --git a/src/mem/slicc/ast/PeekStatementAST.py b/src/mem/slicc/ast/PeekStatementAST.py index a9816bd3d..d267df26e 100644 --- a/src/mem/slicc/ast/PeekStatementAST.py +++ b/src/mem/slicc/ast/PeekStatementAST.py @@ -68,12 +68,11 @@ class PeekStatementAST(StatementAST): if self.pairs.has_key("block_on"): address_field = self.pairs['block_on'] code(''' - if ( (m_is_blocking == true) && - (m_block_map.count(in_msg_ptr->m_$address_field) == 1) ) { - if (m_block_map[in_msg_ptr->m_$address_field] != &$qcode) { + if (m_is_blocking && + (m_block_map.count(in_msg_ptr->m_$address_field) == 1) && + (m_block_map[in_msg_ptr->m_$address_field] != &$qcode)) { $qcode.delayHead(); continue; - } } ''') |