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authorAndreas Hansson <andreas.hansson@arm.com>2013-02-19 12:57:47 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2013-02-19 12:57:47 -0500
commitda950caed24f7674be4aa999c2f17c520165fd84 (patch)
tree1dbdeaae1f440c05c3df3c388eac4da01f55b284 /src/mem
parenta86f67e706cda064c95aca7cc89bceb64b92368f (diff)
downloadgem5-da950caed24f7674be4aa999c2f17c520165fd84.tar.xz
mem: Fix sender state bug and delay popping
This patch fixes a newly introduced bug where the sender state was popped before checking that it should be. Amazingly all regressions pass, but Linux fails to boot on the detailed CPU with caches enabled.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/cache/cache_impl.hh3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 8f7938b93..2be41642d 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -366,7 +366,7 @@ Cache<TagStore>::recvTimingSnoopResp(PacketPtr pkt)
// must be cache-to-cache response from upper to lower level
ForwardResponseRecord *rec =
- dynamic_cast<ForwardResponseRecord *>(pkt->popSenderState());
+ dynamic_cast<ForwardResponseRecord *>(pkt->senderState);
assert(!system->bypassCaches());
if (rec == NULL) {
@@ -379,6 +379,7 @@ Cache<TagStore>::recvTimingSnoopResp(PacketPtr pkt)
return;
}
+ pkt->popSenderState();
pkt->setDest(rec->prevSrc);
delete rec;
// @todo someone should pay for this