base, mem: Disambiguate if an addr range is contained or overlaps

We need to determined whether an address range is fully contained or
it overlaps with an address range in the address range in the mmap. As
an example, we use address range maps to associate ports to address
ranges and we determine which port we will forward the request based
on which address range contains the addresses accessed by the
request. We also need to make sure that when we add a new port to the
address range map, its address range does not overlap with any of the
existing ports.

This patch splits the function find() into two functions contains()
and intersects() to implement this distinct functionality. It also
changes the xbar and the physical memory to use the right function.

Change-Id: If3fd3f774a16b27db2df76dc04f1d61824938008
Reviewed-on: https://gem5-review.googlesource.com/11115
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

2 files changed, 11 insertions, 10 deletions

diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index 586f1c475..c7dbb3bcb 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012, 2014 ARM Limited
+ * Copyright (c) 2012, 2014, 2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -241,7 +241,7 @@ PhysicalMemory::isMemAddr(Addr addr) const
         return true;
     } else {
         // lookup in the interval tree
-        const auto& r = addrMap.find(addr);
+        const auto& r = addrMap.contains(addr);
         if (r == addrMap.end()) {
             // not in the cache, and not in the tree
             return false;
@@ -298,7 +298,7 @@ PhysicalMemory::access(PacketPtr pkt)
     } else {
         // do not update the cache here, as we typically call
         // isMemAddr before calling access
-        const auto& m = addrMap.find(addr);
+        const auto& m = addrMap.contains(addr);
         assert(m != addrMap.end());
         m->second->access(pkt);
     }
@@ -314,7 +314,7 @@ PhysicalMemory::functionalAccess(PacketPtr pkt)
     } else {
         // do not update the cache here, as we typically call
         // isMemAddr before calling functionalAccess
-        const auto& m = addrMap.find(addr);
+        const auto& m = addrMap.contains(addr);
         assert(m != addrMap.end());
         m->second->functionalAccess(pkt);
     }
@@ -406,7 +406,7 @@ PhysicalMemory::unserialize(CheckpointIn &cp)
     UNSERIALIZE_CONTAINER(lal_addr);
     UNSERIALIZE_CONTAINER(lal_cid);
     for (size_t i = 0; i < lal_addr.size(); ++i) {
-        const auto& m = addrMap.find(lal_addr[i]);
+        const auto& m = addrMap.contains(lal_addr[i]);
         m->second->addLockedAddr(LockedAddr(lal_addr[i], lal_cid[i]));
     }
 
diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc
index db0bf180e..1984a94aa 100644
--- a/src/mem/xbar.cc
+++ b/src/mem/xbar.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2011-2015 ARM Limited
+ * Copyright (c) 2011-2015, 2018 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -333,7 +333,7 @@ BaseXBar::findPort(Addr addr)
         return dest_id;
 
     // Check the address map interval tree
-    auto i = portMap.find(addr);
+    auto i = portMap.contains(addr);
     if (i != portMap.end()) {
         dest_id = i->second;
         updatePortCache(dest_id, i->first);
@@ -420,8 +420,9 @@ BaseXBar::recvRangeChange(PortID master_port_id)
             DPRINTF(AddrRanges, "Adding range %s for id %d\n",
                     r.to_string(), master_port_id);
             if (portMap.insert(r, master_port_id) == portMap.end()) {
-                PortID conflict_id = portMap.find(r)->second;
-                fatal("%s has two ports responding within range %s:\n\t%s\n\t%s\n",
+                PortID conflict_id = portMap.intersects(r)->second;
+                fatal("%s has two ports responding within range "
+                      "%s:\n\t%s\n\t%s\n",
                       name(),
                       r.to_string(),
                       masterPorts[master_port_id]->getSlavePort().name(),
@@ -496,7 +497,7 @@ BaseXBar::recvRangeChange(PortID master_port_id)
             }
         }
 
-        // also check that no range partially overlaps with the
+        // also check that no range partially intersects with the
         // default range, this has to be done after all ranges are set
         // as there are no guarantees for when the default range is
         // update with respect to the other ones