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authorDerek Hower <drh5@cs.wisc.edu>2009-07-08 00:31:33 -0500
committerDerek Hower <drh5@cs.wisc.edu>2009-07-08 00:31:33 -0500
commit2f9d8bff5b67e7a64a0269f24dd7c472d3de3533 (patch)
treefaed97eb48ce93f249396d1cf2b653054f177f4e /src/mem
parent96c36afea9d1c5062a0272c8c53599b5637e6cdc (diff)
downloadgem5-2f9d8bff5b67e7a64a0269f24dd7c472d3de3533.tar.xz
slicc: Fixed MI_example bug. The directory was not writing data to DRAM after a PUTX.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/protocol/MI_example-dir.sm27
1 files changed, 16 insertions, 11 deletions
diff --git a/src/mem/protocol/MI_example-dir.sm b/src/mem/protocol/MI_example-dir.sm
index f597ab73c..29678ffc4 100644
--- a/src/mem/protocol/MI_example-dir.sm
+++ b/src/mem/protocol/MI_example-dir.sm
@@ -374,6 +374,13 @@ machine(Directory, "Directory protocol") : LATENCY_TO_MEM_CTRL_LATENCY LATENCY_D
}
}
+ action(v_allocateTBEFromRequestNet, "\v", desc="Allocate TBE") {
+ peek(requestQueue_in, RequestMsg) {
+ TBEs.allocate(address);
+ TBEs[address].DataBlk := in_msg.DataBlk;
+ }
+ }
+
action(w_deallocateTBE, "w", desc="Deallocate TBE") {
TBEs.deallocate(address);
}
@@ -478,6 +485,10 @@ machine(Directory, "Directory protocol") : LATENCY_TO_MEM_CTRL_LATENCY LATENCY_D
memQueue_in.dequeue();
}
+ action(w_writeDataToMemoryFromTBE, "\w", desc="Write date to directory memory from TBE") {
+ directory[address].DataBlk := TBEs[address].DataBlk;
+ }
+
// TRANSITIONS
transition({M_DRD, M_DWR}, GETX) {
@@ -548,27 +559,20 @@ machine(Directory, "Directory protocol") : LATENCY_TO_MEM_CTRL_LATENCY LATENCY_D
}
transition(M_DWR, PUTX, M_DWRI) {
- dwt_writeDMADataFromTBE;
qw_queueMemoryWBRequest_partialTBE;
- //a_sendWriteBackAck;
c_clearOwner;
- //da_sendDMAAck;
w_deallocateTBE;
i_popIncomingRequestQueue;
}
transition(M_DWRI, Memory_Ack, I) {
- //dwt_writeDMADataFromTBE;
+ w_writeDataToMemoryFromTBE;
l_sendWriteBackAck;
- //c_clearOwner;
da_sendDMAAck;
- //w_deallocateTBE;
+ w_deallocateTBE;
l_popMemQueue;
}
-
-
-
transition(M, GETX, M) {
f_forwardRequest;
e_ownerIsRequestor;
@@ -577,15 +581,16 @@ machine(Directory, "Directory protocol") : LATENCY_TO_MEM_CTRL_LATENCY LATENCY_D
transition(M, PUTX, MI) {
c_clearOwner;
-// l_writeDataToMemory;
+ v_allocateTBEFromRequestNet;
l_queueMemoryWBRequest;
-// a_sendWriteBackAck;
d_deallocateDirectory;
i_popIncomingRequestQueue;
}
transition(MI, Memory_Ack, I) {
+ w_writeDataToMemoryFromTBE;
l_sendWriteBackAck;
+ w_deallocateTBE;
l_popMemQueue;
}